upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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89 lines
1.9 KiB
89 lines
1.9 KiB
/*
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* (C) Copyright 2007
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* Vlad Lungu vlad@comsys.ro
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <command.h>
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#include <asm/mipsregs.h>
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#include <asm/io.h>
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long int initdram(int board_type)
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{
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/* Sdram is setup by assembler code */
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/* If memory could be changed, we should return the true value here */
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return MEM_SIZE*1024*1024;
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}
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int checkboard(void)
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{
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u32 proc_id;
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u32 config1;
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proc_id = read_32bit_cp0_register(CP0_PRID);
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printf("Board: Qemu -M mips CPU: ");
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switch (proc_id) {
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case 0x00018000:
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printf("4Kc");
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break;
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case 0x00018400:
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printf("4KEcR1");
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break;
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case 0x00019000:
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printf("4KEc");
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break;
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case 0x00019300:
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config1 = read_mips32_cp0_config1();
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if (config1 & 1)
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printf("24Kf");
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else
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printf("24Kc");
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break;
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case 0x00019500:
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printf("34Kf");
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break;
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case 0x00000400:
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printf("R4000");
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break;
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case 0x00018100:
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config1 = read_mips32_cp0_config1();
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if (config1 & 1)
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printf("5Kf");
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else
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printf("5Kc");
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break;
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case 0x000182a0:
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printf("20Kc");
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break;
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default:
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printf("unknown");
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}
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printf(" proc_id=0x%x\n", proc_id);
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return 0;
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}
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int misc_init_r(void)
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{
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set_io_port_base(0);
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return 0;
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}
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