upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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637 lines
14 KiB
637 lines
14 KiB
/*
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* (C) Copyright 2002, 2003
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* Daniel Engström, Omicron Ceti AB, daniel@omicron.se
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Alex Zuepke <azu@sysgo.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <pci.h>
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#include <asm/ic/sc520.h>
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#define PROBE_BUFFER_SIZE 1024
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static unsigned char buffer[PROBE_BUFFER_SIZE];
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#define SC520_MAX_FLASH_BANKS 3
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#define SC520_FLASH_BANK0_BASE 0x38000000 /* BOOTCS */
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#define SC520_FLASH_BANK1_BASE 0x30000000 /* ROMCS0 */
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#define SC520_FLASH_BANK2_BASE 0x28000000 /* ROMCS1 */
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#define SC520_FLASH_BANKSIZE 0x8000000
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#define AMD29LV016B_SIZE 0x200000
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#define AMD29LV016B_SECTORS 32
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flash_info_t flash_info[SC520_MAX_FLASH_BANKS];
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#define READY 1
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#define ERR 2
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#define TMO 4
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/*-----------------------------------------------------------------------
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*/
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static u32 _probe_flash(u32 addr, u32 bw, int il)
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{
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u32 result=0;
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/* First do an unlock cycle for the benefit of
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* devices that need it */
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switch (bw) {
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case 1:
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*(volatile u8*)(addr+0x5555) = 0xaa;
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*(volatile u8*)(addr+0x2aaa) = 0x55;
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*(volatile u8*)(addr+0x5555) = 0x90;
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/* Read vendor */
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result = *(volatile u8*)addr;
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result <<= 16;
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/* Read device */
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result |= *(volatile u8*)(addr+2);
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/* Return device to data mode */
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*(volatile u8*)addr = 0xff;
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*(volatile u8*)(addr+0x5555), 0xf0;
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break;
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case 2:
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*(volatile u16*)(addr+0xaaaa) = 0xaaaa;
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*(volatile u16*)(addr+0x5554) = 0x5555;
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/* Issue identification command */
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if (il == 2) {
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*(volatile u16*)(addr+0xaaaa) = 0x9090;
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/* Read vendor */
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result = *(volatile u8*)addr;
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result <<= 16;
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/* Read device */
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result |= *(volatile u8*)(addr+2);
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/* Return device to data mode */
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*(volatile u16*)addr = 0xffff;
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*(volatile u16*)(addr+0xaaaa), 0xf0f0;
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} else {
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*(volatile u8*)(addr+0xaaaa) = 0x90;
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/* Read vendor */
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result = *(volatile u16*)addr;
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result <<= 16;
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/* Read device */
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result |= *(volatile u16*)(addr+2);
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/* Return device to data mode */
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*(volatile u8*)addr = 0xff;
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*(volatile u8*)(addr+0xaaaa), 0xf0;
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}
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break;
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case 4:
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*(volatile u32*)(addr+0x5554) = 0xaaaaaaaa;
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*(volatile u32*)(addr+0xaaa8) = 0x55555555;
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switch (il) {
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case 1:
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/* Issue identification command */
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*(volatile u8*)(addr+0x5554) = 0x90;
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/* Read vendor */
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result = *(volatile u16*)addr;
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result <<= 16;
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/* Read device */
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result |= *(volatile u16*)(addr+4);
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/* Return device to data mode */
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*(volatile u8*)addr = 0xff;
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*(volatile u8*)(addr+0x5554), 0xf0;
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break;
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case 2:
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/* Issue identification command */
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*(volatile u32*)(addr + 0x5554) = 0x00900090;
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/* Read vendor */
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result = *(volatile u16*)addr;
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result <<= 16;
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/* Read device */
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result |= *(volatile u16*)(addr+4);
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/* Return device to data mode */
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*(volatile u32*)addr = 0x00ff00ff;
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*(volatile u32*)(addr+0x5554), 0x00f000f0;
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break;
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case 4:
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/* Issue identification command */
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*(volatile u32*)(addr+0x5554) = 0x90909090;
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/* Read vendor */
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result = *(volatile u8*)addr;
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result <<= 16;
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/* Read device */
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result |= *(volatile u8*)(addr+4);
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/* Return device to data mode */
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*(volatile u32*)addr = 0xffffffff;
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*(volatile u32*)(addr+0x5554), 0xf0f0f0f0;
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break;
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}
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break;
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}
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return result;
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}
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extern int _probe_flash_end;
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asm ("_probe_flash_end:\n"
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".long 0\n");
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static int identify_flash(unsigned address, int width)
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{
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int is;
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int device;
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int vendor;
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int size;
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unsigned res;
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u32 (*_probe_flash_ptr)(u32 a, u32 bw, int il);
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size = (unsigned)&_probe_flash_end - (unsigned)_probe_flash;
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if (size > PROBE_BUFFER_SIZE) {
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printf("_probe_flash() routine too large (%d) %p - %p\n",
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size, &_probe_flash_end, _probe_flash);
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return 0;
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}
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memcpy(buffer, _probe_flash, size);
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_probe_flash_ptr = (void*)buffer;
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is = disable_interrupts();
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res = _probe_flash_ptr(address, width, 1);
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if (is) {
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enable_interrupts();
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}
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vendor = res >> 16;
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device = res & 0xffff;
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return res;
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}
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ulong flash_init(void)
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{
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int i, j;
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ulong size = 0;
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for (i = 0; i < SC520_MAX_FLASH_BANKS; i++) {
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unsigned id;
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ulong flashbase = 0;
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int sectsize = 0;
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memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
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switch (i) {
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case 0:
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flashbase = SC520_FLASH_BANK0_BASE;
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break;
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case 1:
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flashbase = SC520_FLASH_BANK1_BASE;
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break;
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case 2:
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flashbase = SC520_FLASH_BANK2_BASE;
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break;
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default:
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panic("configured too many flash banks!\n");
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}
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id = identify_flash(flashbase, 4);
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switch (id & 0x00ff00ff) {
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case 0x000100c8:
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/* 29LV016B/29LV017B */
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flash_info[i].flash_id =
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(AMD_MANUFACT & FLASH_VENDMASK) |
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(AMD_ID_LV016B & FLASH_TYPEMASK);
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flash_info[i].size = AMD29LV016B_SIZE*4;
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flash_info[i].sector_count = AMD29LV016B_SECTORS;
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sectsize = (AMD29LV016B_SIZE*4)/AMD29LV016B_SECTORS;
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printf("Bank %d: 4 x AMD 29LV017B\n", i);
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break;
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default:
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printf("Bank %d have unknown flash %08x\n", i, id);
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flash_info[i].flash_id = FLASH_UNKNOWN;
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continue;
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}
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for (j = 0; j < flash_info[i].sector_count; j++) {
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flash_info[i].start[j] = flashbase + j * sectsize;
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}
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size += flash_info[i].size;
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flash_protect(FLAG_PROTECT_CLEAR,
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flash_info[i].start[0],
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flash_info[i].start[0] + flash_info[i].size - 1,
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&flash_info[i]);
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}
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/*
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* Protect monitor and environment sectors
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*/
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flash_protect(FLAG_PROTECT_SET,
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i386boot_start,
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i386boot_end,
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&flash_info[0]);
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#ifdef CFG_ENV_ADDR
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flash_protect(FLAG_PROTECT_SET,
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CFG_ENV_ADDR,
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CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
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&flash_info[0]);
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#endif
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return size;
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}
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/*-----------------------------------------------------------------------
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*/
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void flash_print_info(flash_info_t *info)
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{
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int i;
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switch (info->flash_id & FLASH_VENDMASK) {
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case (AMD_MANUFACT & FLASH_VENDMASK):
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printf("AMD: ");
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switch (info->flash_id & FLASH_TYPEMASK) {
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case (AMD_ID_LV016B & FLASH_TYPEMASK):
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printf("4x AMD29LV017B (4x16Mbit)\n");
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break;
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default:
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printf("Unknown Chip Type\n");
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goto done;
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break;
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}
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break;
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default:
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printf("Unknown Vendor ");
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break;
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}
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printf(" Size: %ld MB in %d Sectors\n",
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info->size >> 20, info->sector_count);
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printf(" Sector Start Addresses:");
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for (i = 0; i < info->sector_count; i++) {
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if ((i % 5) == 0) {
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printf ("\n ");
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}
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printf (" %08lX%s", info->start[i],
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info->protect[i] ? " (RO)" : " ");
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}
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printf ("\n");
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done: ;
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}
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/*-----------------------------------------------------------------------
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*/
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/* this needs to be inlined, the SWTMRMMILLI register is reset by each read */
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#define __udelay(delay) \
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{ \
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unsigned micro; \
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unsigned milli=0; \
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\
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micro = *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI); \
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\
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for (;;) { \
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\
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milli += *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI); \
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micro = *(volatile u16*)(0xfffef000+SC520_SWTMRMICRO); \
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\
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if ((delay) <= (micro + (milli * 1000))) { \
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break; \
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} \
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} \
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} while (0)
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static u32 _amd_erase_flash(u32 addr, u32 sector)
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{
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unsigned elapsed;
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/* Issue erase */
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*(volatile u32*)(addr + 0x5554) = 0xAAAAAAAA;
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*(volatile u32*)(addr + 0xaaa8) = 0x55555555;
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*(volatile u32*)(addr + 0x5554) = 0x80808080;
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/* And one unlock */
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*(volatile u32*)(addr + 0x5554) = 0xAAAAAAAA;
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*(volatile u32*)(addr + 0xaaa8) = 0x55555555;
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/* Sector erase command comes last */
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*(volatile u32*)(addr + sector) = 0x30303030;
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elapsed = *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI); /* dummy read */
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elapsed = 0;
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__udelay(50);
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while (((*(volatile u32*)(addr + sector)) & 0x80808080) != 0x80808080) {
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elapsed += *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI);
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if (elapsed > ((CFG_FLASH_ERASE_TOUT/CFG_HZ) * 1000)) {
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*(volatile u32*)(addr) = 0xf0f0f0f0;
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return 1;
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}
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}
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*(volatile u32*)(addr) = 0xf0f0f0f0;
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return 0;
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}
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extern int _amd_erase_flash_end;
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asm ("_amd_erase_flash_end:\n"
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".long 0\n");
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int flash_erase(flash_info_t *info, int s_first, int s_last)
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{
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u32 (*_erase_flash_ptr)(u32 a, u32 so);
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int prot;
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int sect;
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unsigned size;
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if ((s_first < 0) || (s_first > s_last)) {
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if (info->flash_id == FLASH_UNKNOWN) {
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printf("- missing\n");
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} else {
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printf("- no sectors to erase\n");
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}
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return 1;
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}
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if ((info->flash_id & FLASH_VENDMASK) == (AMD_MANUFACT & FLASH_VENDMASK)) {
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size = (unsigned)&_amd_erase_flash_end - (unsigned)_amd_erase_flash;
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if (size > PROBE_BUFFER_SIZE) {
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printf("_amd_erase_flash() routine too large (%d) %p - %p\n",
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size, &_amd_erase_flash_end, _amd_erase_flash);
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return 0;
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}
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memcpy(buffer, _amd_erase_flash, size);
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_erase_flash_ptr = (void*)buffer;
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} else {
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printf ("Can't erase unknown flash type - aborted\n");
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return 1;
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}
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prot = 0;
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for (sect=s_first; sect<=s_last; ++sect) {
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if (info->protect[sect]) {
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prot++;
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}
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}
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if (prot) {
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printf ("- Warning: %d protected sectors will not be erased!\n", prot);
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} else {
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printf ("\n");
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}
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/* Start erase on unprotected sectors */
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for (sect = s_first; sect<=s_last; sect++) {
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if (info->protect[sect] == 0) { /* not protected */
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int res;
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int flag;
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/* Disable interrupts which might cause a timeout here */
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flag = disable_interrupts();
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res = _erase_flash_ptr(info->start[0], info->start[sect]-info->start[0]);
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/* re-enable interrupts if necessary */
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if (flag) {
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enable_interrupts();
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}
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if (res) {
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printf("Erase timed out, sector %d\n", sect);
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return res;
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}
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putc('.');
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}
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}
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return 0;
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}
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/*-----------------------------------------------------------------------
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* Write a word to Flash, returns:
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* 0 - OK
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* 1 - write timeout
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* 2 - Flash not erased
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*/
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static int _amd_write_word(unsigned start, unsigned dest, unsigned data)
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{
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volatile u32 *addr2 = (u32*)start;
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volatile u32 *dest2 = (u32*)dest;
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volatile u32 *data2 = (u32*)&data;
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unsigned elapsed;
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/* Check if Flash is (sufficiently) erased */
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if ((*((volatile u32*)dest) & (u32)data) != (u32)data) {
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return 2;
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}
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addr2[0x5554] = 0xAAAAAAAA;
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addr2[0xaaa8] = 0x55555555;
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addr2[0x5554] = 0xA0A0A0A0;
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dest2[0] = data;
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elapsed = *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI); /* dummy read */
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elapsed = 0;
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/* data polling for D7 */
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while ((dest2[0] & 0x80808080) != (data2[0] & 0x80808080)) {
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elapsed += *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI);
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if (elapsed > ((CFG_FLASH_WRITE_TOUT/CFG_HZ) * 1000)) {
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addr2[0] = 0xf0f0f0f0;
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return 1;
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}
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}
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addr2[0] = 0xf0f0f0f0;
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return 0;
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}
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extern int _amd_write_word_end;
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asm ("_amd_write_word_end:\n"
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".long 0\n");
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|
|
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/*-----------------------------------------------------------------------
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* Copy memory to flash, returns:
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* 0 - OK
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* 1 - write timeout
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* 2 - Flash not erased
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* 3 - Unsupported flash type
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*/
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int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
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{
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ulong cp, wp, data;
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int i, l, rc;
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int flag;
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u32 (*_write_word_ptr)(unsigned start, unsigned dest, unsigned data);
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unsigned size;
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|
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if ((info->flash_id & FLASH_VENDMASK) == (AMD_MANUFACT & FLASH_VENDMASK)) {
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size = (unsigned)&_amd_write_word_end - (unsigned)_amd_write_word;
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if (size > PROBE_BUFFER_SIZE) {
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printf("_amd_write_word() routine too large (%d) %p - %p\n",
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size, &_amd_write_word_end, _amd_write_word);
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return 0;
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}
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memcpy(buffer, _amd_write_word, size);
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_write_word_ptr = (void*)buffer;
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} else {
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printf ("Can't program unknown flash type - aborted\n");
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return 3;
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}
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wp = (addr & ~3); /* get lower word aligned address */
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/*
|
|
* handle unaligned start bytes
|
|
*/
|
|
if ((l = addr - wp) != 0) {
|
|
data = 0;
|
|
for (i=0, cp=wp; i<l; ++i, ++cp) {
|
|
data |= (*(uchar *)cp) << (8*i);
|
|
}
|
|
for (; i<4 && cnt>0; ++i) {
|
|
data |= *src++ << (8*i);
|
|
--cnt;
|
|
++cp;
|
|
}
|
|
for (; cnt==0 && i<4; ++i, ++cp) {
|
|
data |= (*(uchar *)cp) << (8*i);
|
|
}
|
|
|
|
/* Disable interrupts which might cause a timeout here */
|
|
flag = disable_interrupts();
|
|
|
|
rc = _write_word_ptr(info->start[0], wp, data);
|
|
|
|
/* re-enable interrupts if necessary */
|
|
if (flag) {
|
|
enable_interrupts();
|
|
}
|
|
if (rc != 0) {
|
|
return rc;
|
|
}
|
|
wp += 4;
|
|
}
|
|
|
|
/*
|
|
* handle word aligned part
|
|
*/
|
|
while (cnt >= 4) {
|
|
data = 0;
|
|
|
|
for (i=0; i<4; ++i) {
|
|
data |= *src++ << (8*i);
|
|
}
|
|
|
|
/* Disable interrupts which might cause a timeout here */
|
|
flag = disable_interrupts();
|
|
|
|
rc = _write_word_ptr(info->start[0], wp, data);
|
|
|
|
/* re-enable interrupts if necessary */
|
|
if (flag) {
|
|
enable_interrupts();
|
|
}
|
|
if (rc != 0) {
|
|
return rc;
|
|
}
|
|
wp += 4;
|
|
cnt -= 4;
|
|
}
|
|
|
|
if (cnt == 0) {
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* handle unaligned tail bytes
|
|
*/
|
|
data = 0;
|
|
for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
|
|
data |= *src++ << (8*i);
|
|
--cnt;
|
|
}
|
|
|
|
for (; i<4; ++i, ++cp) {
|
|
data |= (*(uchar *)cp) << (8*i);
|
|
}
|
|
|
|
/* Disable interrupts which might cause a timeout here */
|
|
flag = disable_interrupts();
|
|
|
|
rc = _write_word_ptr(info->start[0], wp, data);
|
|
|
|
/* re-enable interrupts if necessary */
|
|
if (flag) {
|
|
enable_interrupts();
|
|
}
|
|
|
|
return rc;
|
|
|
|
}
|
|
|