upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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52 lines
1.2 KiB
52 lines
1.2 KiB
/*
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* Embest/Timll DevKit3250 board support
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*
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* Copyright (C) 2011 Vladimir Zapolskiy <vz@mleia.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/emc.h>
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DECLARE_GLOBAL_DATA_PTR;
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static struct emc_regs *emc = (struct emc_regs *)EMC_BASE;
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int board_early_init_f(void)
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{
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lpc32xx_uart_init(CONFIG_SYS_LPC32XX_UART);
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return 0;
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}
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int board_init(void)
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{
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/* adress of boot parameters */
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gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
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#ifdef CONFIG_SYS_FLASH_CFI
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/* Use 16-bit memory interface for NOR Flash */
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emc->stat[0].config = EMC_STAT_CONFIG_PB | EMC_STAT_CONFIG_16BIT;
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/* Change the NOR timings to optimum value to get maximum bandwidth */
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emc->stat[0].waitwen = EMC_STAT_WAITWEN(1);
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emc->stat[0].waitoen = EMC_STAT_WAITOEN(1);
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emc->stat[0].waitrd = EMC_STAT_WAITRD(12);
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emc->stat[0].waitpage = EMC_STAT_WAITPAGE(12);
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emc->stat[0].waitwr = EMC_STAT_WAITWR(5);
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emc->stat[0].waitturn = EMC_STAT_WAITTURN(2);
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#endif
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return 0;
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}
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int dram_init(void)
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{
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gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
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CONFIG_SYS_SDRAM_SIZE);
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return 0;
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}
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