upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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386 lines
7.4 KiB
386 lines
7.4 KiB
/*
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* (C) Copyright 2003 - 2009
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*
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* Based on the MPC5xxx code.
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*/
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#include <common.h>
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#include <asm/io.h>
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DECLARE_GLOBAL_DATA_PTR;
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#ifdef CONFIG_HARD_I2C
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#include <i2c.h>
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/* by default set I2C bus 0 active */
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static unsigned int bus_num __attribute__ ((section (".data"))) = 0;
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#define I2C_TIMEOUT 100
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#define I2C_RETRIES 3
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struct mpc512x_i2c_tap {
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int scl2tap;
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int tap2tap;
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};
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static int mpc_reg_in(volatile u32 *reg);
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static void mpc_reg_out(volatile u32 *reg, int val, int mask);
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static int wait_for_bb(void);
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static int wait_for_pin(int *status);
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static int do_address(uchar chip, char rdwr_flag);
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static int send_bytes(uchar chip, char *buf, int len);
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static int receive_bytes(uchar chip, char *buf, int len);
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static int mpc_get_fdr(int);
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static int mpc_reg_in (volatile u32 *reg)
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{
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int ret = in_be32(reg) >> 24;
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return ret;
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}
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static void mpc_reg_out (volatile u32 *reg, int val, int mask)
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{
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if (!mask) {
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out_be32(reg, val << 24);
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} else {
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clrsetbits_be32(reg, mask << 24, (val & mask) << 24);
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}
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}
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static int wait_for_bb (void)
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{
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volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
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volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
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int timeout = I2C_TIMEOUT;
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int status;
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status = mpc_reg_in (®s->msr);
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while (timeout-- && (status & I2C_BB)) {
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mpc_reg_out (®s->mcr, I2C_STA, I2C_STA);
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(void)mpc_reg_in(®s->mdr);
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mpc_reg_out (®s->mcr, 0, I2C_STA);
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mpc_reg_out (®s->mcr, 0, 0);
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mpc_reg_out (®s->mcr, I2C_EN, 0);
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udelay (1000);
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status = mpc_reg_in (®s->msr);
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}
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return (status & I2C_BB);
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}
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static int wait_for_pin (int *status)
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{
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volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
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volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
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int timeout = I2C_TIMEOUT;
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*status = mpc_reg_in (®s->msr);
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while (timeout-- && !(*status & I2C_IF)) {
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udelay (1000);
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*status = mpc_reg_in (®s->msr);
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}
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if (!(*status & I2C_IF)) {
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return -1;
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}
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mpc_reg_out (®s->msr, 0, I2C_IF);
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return 0;
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}
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static int do_address (uchar chip, char rdwr_flag)
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{
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volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
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volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
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int status;
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chip <<= 1;
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if (rdwr_flag) {
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chip |= 1;
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}
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mpc_reg_out (®s->mcr, I2C_TX, I2C_TX);
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mpc_reg_out (®s->mdr, chip, 0);
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if (wait_for_pin (&status)) {
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return -2;
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}
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if (status & I2C_RXAK) {
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return -3;
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}
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return 0;
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}
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static int send_bytes (uchar chip, char *buf, int len)
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{
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volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
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volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
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int wrcount;
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int status;
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for (wrcount = 0; wrcount < len; ++wrcount) {
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mpc_reg_out (®s->mdr, buf[wrcount], 0);
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if (wait_for_pin (&status)) {
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break;
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}
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if (status & I2C_RXAK) {
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break;
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}
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}
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return !(wrcount == len);
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}
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static int receive_bytes (uchar chip, char *buf, int len)
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{
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volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
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volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
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int dummy = 1;
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int rdcount = 0;
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int status;
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int i;
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mpc_reg_out (®s->mcr, 0, I2C_TX);
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for (i = 0; i < len; ++i) {
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buf[rdcount] = mpc_reg_in (®s->mdr);
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if (dummy) {
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dummy = 0;
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} else {
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rdcount++;
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}
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if (wait_for_pin (&status)) {
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return -4;
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}
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}
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mpc_reg_out (®s->mcr, I2C_TXAK, I2C_TXAK);
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buf[rdcount++] = mpc_reg_in (®s->mdr);
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if (wait_for_pin (&status)) {
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return -5;
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}
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mpc_reg_out (®s->mcr, 0, I2C_TXAK);
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return 0;
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}
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/**************** I2C API ****************/
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void i2c_init (int speed, int saddr)
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{
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volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
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int i;
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for (i = 0; i < I2C_BUS_CNT; i++){
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volatile i2c512x_dev_t *regs = &im->i2c.dev[i];
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mpc_reg_out (®s->mcr, 0, 0);
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/* Set clock */
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mpc_reg_out (®s->mfdr, mpc_get_fdr (speed), 0);
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mpc_reg_out (®s->madr, saddr << 1, 0);
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/* Enable module */
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mpc_reg_out (®s->mcr, I2C_EN, I2C_INIT_MASK);
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mpc_reg_out (®s->msr, 0, I2C_IF);
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}
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/* Disable interrupts */
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out_be32(&im->i2c.icr, 0);
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/* Turn off filters */
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out_be32(&im->i2c.mifr, 0);
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}
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static int mpc_get_fdr (int speed)
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{
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static int fdr = -1;
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if (fdr == -1) {
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ulong best_speed = 0;
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ulong divider;
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ulong ips, scl;
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ulong bestmatch = 0xffffffffUL;
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int best_i = 0, best_j = 0, i, j;
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int SCL_Tap[] = { 9, 10, 12, 15, 5, 6, 7, 8};
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struct mpc512x_i2c_tap scltap[] = {
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{4, 1},
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{4, 2},
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{6, 4},
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{6, 8},
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{14, 16},
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{30, 32},
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{62, 64},
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{126, 128}
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};
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ips = gd->arch.ips_clk;
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for (i = 7; i >= 0; i--) {
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for (j = 7; j >= 0; j--) {
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scl = 2 * (scltap[j].scl2tap +
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(SCL_Tap[i] - 1) * scltap[j].tap2tap
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+ 2);
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if (ips <= speed*scl) {
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if ((speed*scl - ips) < bestmatch) {
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bestmatch = speed*scl - ips;
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best_i = i;
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best_j = j;
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best_speed = ips/scl;
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}
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}
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}
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}
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divider = (best_i & 3) | ((best_i & 4) << 3) | (best_j << 2);
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if (gd->flags & GD_FLG_RELOC) {
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fdr = divider;
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} else {
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debug("%ld kHz, \n", best_speed / 1000);
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return divider;
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}
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}
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return fdr;
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}
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int i2c_probe (uchar chip)
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{
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volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
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volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
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int i;
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for (i = 0; i < I2C_RETRIES; i++) {
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mpc_reg_out (®s->mcr, I2C_STA, I2C_STA);
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if (! do_address (chip, 0)) {
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mpc_reg_out (®s->mcr, 0, I2C_STA);
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udelay (500);
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break;
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}
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mpc_reg_out (®s->mcr, 0, I2C_STA);
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udelay (500);
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}
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return (i == I2C_RETRIES);
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}
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int i2c_read (uchar chip, uint addr, int alen, uchar *buf, int len)
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{
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volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
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volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
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char xaddr[4];
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int ret = -1;
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xaddr[0] = (addr >> 24) & 0xFF;
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xaddr[1] = (addr >> 16) & 0xFF;
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xaddr[2] = (addr >> 8) & 0xFF;
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xaddr[3] = addr & 0xFF;
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if (wait_for_bb ()) {
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printf ("i2c_read: bus is busy\n");
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goto Done;
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}
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mpc_reg_out (®s->mcr, I2C_STA, I2C_STA);
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if (do_address (chip, 0)) {
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printf ("i2c_read: failed to address chip\n");
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goto Done;
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}
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if (send_bytes (chip, &xaddr[4-alen], alen)) {
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printf ("i2c_read: send_bytes failed\n");
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goto Done;
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}
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mpc_reg_out (®s->mcr, I2C_RSTA, I2C_RSTA);
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if (do_address (chip, 1)) {
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printf ("i2c_read: failed to address chip\n");
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goto Done;
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}
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if (receive_bytes (chip, (char *)buf, len)) {
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printf ("i2c_read: receive_bytes failed\n");
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goto Done;
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}
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ret = 0;
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Done:
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mpc_reg_out (®s->mcr, 0, I2C_STA);
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return ret;
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}
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int i2c_write (uchar chip, uint addr, int alen, uchar *buf, int len)
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{
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volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
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volatile i2c512x_dev_t *regs = &im->i2c.dev[bus_num];
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char xaddr[4];
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int ret = -1;
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xaddr[0] = (addr >> 24) & 0xFF;
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xaddr[1] = (addr >> 16) & 0xFF;
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xaddr[2] = (addr >> 8) & 0xFF;
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xaddr[3] = addr & 0xFF;
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if (wait_for_bb ()) {
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printf ("i2c_write: bus is busy\n");
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goto Done;
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}
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mpc_reg_out (®s->mcr, I2C_STA, I2C_STA);
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if (do_address (chip, 0)) {
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printf ("i2c_write: failed to address chip\n");
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goto Done;
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}
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if (send_bytes (chip, &xaddr[4-alen], alen)) {
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printf ("i2c_write: send_bytes failed\n");
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goto Done;
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}
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if (send_bytes (chip, (char *)buf, len)) {
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printf ("i2c_write: send_bytes failed\n");
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goto Done;
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}
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ret = 0;
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Done:
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mpc_reg_out (®s->mcr, 0, I2C_STA);
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return ret;
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}
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int i2c_set_bus_num (unsigned int bus)
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{
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if (bus >= I2C_BUS_CNT) {
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return -1;
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}
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bus_num = bus;
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return 0;
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}
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unsigned int i2c_get_bus_num (void)
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{
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return bus_num;
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}
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#endif /* CONFIG_HARD_I2C */
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