upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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147 lines
4.9 KiB
147 lines
4.9 KiB
/*
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* (C) Copyright 2003
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* EMK Elektronik GmbH <www.emk-elektronik.de>
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* Reinhard Meyer <r.meyer@emk-elektronik.de>
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*
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* Board specific routines for the TOP860
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*
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* - initialisation
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* - interface to VPD data (mac address, clock speeds)
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* - memory controller
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* - serial io initialisation
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* - ethernet io initialisation
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*
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* -----------------------------------------------------------------
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <commproc.h>
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#include <mpc8xx.h>
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/*****************************************************************************
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* UPM table for 60ns EDO RAM at 25 MHz bus/external clock
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*****************************************************************************/
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static const uint edo_60ns_25MHz_tbl[] = {
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/* single read (offset 0x00 in upm ram) */
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0x0ff3fc04,0x08f3fc04,0x00f3fc04,0x00f3fc00,
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0x33f7fc07,0xfffffc05,0xfffffc05,0xfffffc05,
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/* burst read (offset 0x08 in upm ram) */
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0x0ff3fc04,0x08f3fc04,0x00f3fc0c,0x0ff3fc40,
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0x0cf3fc04,0x03f3fc48,0x0cf3fc04,0x03f3fc48,
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0x0cf3fc04,0x03f3fc00,0x3ff7fc07,0xfffffc05,
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0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05,
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/* single write (offset 0x18 in upm ram) */
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0x0ffffc04,0x08fffc04,0x30fffc00,0xf1fffc07,
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0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05,
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/* burst write (offset 0x20 in upm ram) */
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0x0ffffc04,0x08fffc00,0x00fffc04,0x03fffc4c,
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0x00fffc00,0x07fffc4c,0x00fffc00,0x0ffffc4c,
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0x00fffc00,0x3ffffc07,0xfffffc05,0xfffffc05,
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0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05,
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/* refresh (offset 0x30 in upm ram) */
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0xc0fffc04,0x07fffc04,0x0ffffc04,0x0ffffc04,
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0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05,
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0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05,
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/* exception (offset 0x3C in upm ram) */
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0xfffffc07,0xfffffc03,0xfffffc05,0xfffffc05,
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};
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/*****************************************************************************
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* Print Board Identity
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*****************************************************************************/
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int checkboard (void)
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{
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puts ("Board:"CONFIG_IDENT_STRING"\n");
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return (0);
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}
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/*****************************************************************************
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* Initialize DRAM controller
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*****************************************************************************/
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phys_size_t initdram (int board_type)
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{
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volatile immap_t *immap = (immap_t *) CFG_IMMR;
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volatile memctl8xx_t *memctl = &immap->im_memctl;
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/*
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* Only initialize memory controller when running from FLASH.
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* When running from RAM, don't touch it.
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*/
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if ((ulong) initdram & 0xff000000) {
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volatile uint *addr1, *addr2;
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uint i, j;
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upmconfig (UPMA, (uint *) edo_60ns_25MHz_tbl,
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sizeof (edo_60ns_25MHz_tbl) / sizeof (uint));
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memctl->memc_mptpr = 0x0200;
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memctl->memc_mamr = 0x0ca20330;
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memctl->memc_or2 = -CFG_DRAM_MAX | OR_CSNT_SAM;
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memctl->memc_br2 = CFG_DRAM_BASE | BR_MS_UPMA | BR_V;
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/*
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* Do 8 read accesses to DRAM
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*/
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addr1 = (volatile uint *) 0;
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addr2 = (volatile uint *) 0x00400000;
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for (i = 0, j = 0; i < 8; i++)
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j = addr1[0];
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/*
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* Now check whether we got 4MB or 16MB populated
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*/
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addr1[0] = 0x12345678;
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addr1[1] = 0x9abcdef0;
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addr2[0] = 0xfeedc0de;
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addr2[1] = 0x47110815;
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if (addr1[0] == 0xfeedc0de && addr1[1] == 0x47110815) {
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/* only 4MB populated */
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memctl->memc_or2 = -(CFG_DRAM_MAX / 4) | OR_CSNT_SAM;
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}
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}
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return -(memctl->memc_or2 & 0xffff0000);
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}
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/*****************************************************************************
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* prepare for FLASH detection
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*****************************************************************************/
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void flash_preinit(void)
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{
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}
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/*****************************************************************************
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* finalize FLASH setup
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*****************************************************************************/
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void flash_afterinit(uint bank, ulong start, ulong size)
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{
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}
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/*****************************************************************************
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* otherinits after RAM is there and we are relocated to RAM
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* note: though this is an int function, nobody cares for the result!
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*****************************************************************************/
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int misc_init_r (void)
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{
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/* read 'factory' part of EEPROM */
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extern void read_factory_r (void);
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read_factory_r ();
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return (0);
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}
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