upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support

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Benoît Thébaudeau 323846561a mx5/6 clocks: Fix SDHC clocks ... The i.MX5 eSDHC clocks were considered as coming from the IPG clock although they have dedicated clock paths. Also, on i.MX5/6, each SDHC instance has a dedicated clock, so gd->sdhc_clk must be set accordingly. This is good for the case only a single SDHC instance is used (initialization made with fsl_esdhc_mmc_init()). A future patch will fix the multi-instance use case (initialization made directly with fsl_esdhc_initialize()). Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Eric Bénard <eric@eukrea.com> Cc: Otavio Salvador <otavio@ossystems.com.br>		12 years ago
..
Makefile	…
cmd_bmode.c	…
cpu.c	…
i2c-mxv7.c	…
iomux-v3.c	…
speed.c	mx5/6 clocks: Fix SDHC clocks	12 years ago
timer.c	mx5/6: Define default SoC input clock frequencies	12 years ago