upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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36 lines
1004 B
36 lines
1004 B
/*
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* arch/arm/include/asm/arch-rcar_gen3/r8a7796.h
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* This file defines registers and value for r8a7796.
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*
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* Copyright (C) 2016 Renesas Electronics Corporation
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ASM_ARCH_R8A7796_H
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#define __ASM_ARCH_R8A7796_H
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#include "rcar-gen3-base.h"
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/* Module stop control/status register bits */
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#define MSTP0_BITS 0x00200000
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#define MSTP1_BITS 0xFFFFFFFF
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#define MSTP2_BITS 0x340E2FDC
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#define MSTP3_BITS 0xFFFFFFDF
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#define MSTP4_BITS 0x80000184
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#define MSTP5_BITS 0xC3FFFFFF
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#define MSTP6_BITS 0xFFFFFFFF
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#define MSTP7_BITS 0xFFFFFFFF
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#define MSTP8_BITS 0x01F1FFF7
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#define MSTP9_BITS 0xFFFFFFFE
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#define MSTP10_BITS 0xFFFEFFE0
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#define MSTP11_BITS 0x000000B7
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/* SDHI */
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#define CONFIG_SYS_SH_SDHI0_BASE 0xEE100000
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#define CONFIG_SYS_SH_SDHI1_BASE 0xEE120000
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#define CONFIG_SYS_SH_SDHI2_BASE 0xEE140000 /* either MMC0 */
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#define CONFIG_SYS_SH_SDHI3_BASE 0xEE160000 /* either MMC1 */
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#define CONFIG_SYS_SH_SDHI_NR_CHANNEL 4
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#endif /* __ASM_ARCH_R8A7796_H */
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