upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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65 lines
1.9 KiB
65 lines
1.9 KiB
/*
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* (C) Copyright 2009 Faraday Technology
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* Po-Yu Chuang <ratbert@faraday-tech.com>
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*
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* Copyright (C) 2010 Andes Technology Corporation
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* Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
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* Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <common.h>
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#include <asm/io.h>
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#include "ftpmu010.h"
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static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE;
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void ftpmu010_32768osc_enable(void)
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{
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unsigned int oscc;
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/* enable the 32768Hz oscillator */
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oscc = readl(&pmu->OSCC);
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oscc &= ~(FTPMU010_OSCC_OSCL_OFF | FTPMU010_OSCC_OSCL_TRI);
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writel(oscc, &pmu->OSCC);
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/* wait until ready */
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while (!(readl(&pmu->OSCC) & FTPMU010_OSCC_OSCL_STABLE))
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;
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/* select 32768Hz oscillator */
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oscc = readl(&pmu->OSCC);
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oscc |= FTPMU010_OSCC_OSCL_RTCLSEL;
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writel(oscc, &pmu->OSCC);
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}
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void ftpmu010_dlldis_disable(void)
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{
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unsigned int pdllcr0;
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pdllcr0 = readl(&pmu->PDLLCR0);
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pdllcr0 |= FTPMU010_PDLLCR0_DLLDIS;
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writel(pdllcr0, &pmu->PDLLCR0);
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}
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void ftpmu010_sdram_clk_disable(unsigned int cr0)
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{
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unsigned int pdllcr0;
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pdllcr0 = readl(&pmu->PDLLCR0);
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pdllcr0 |= FTPMU010_PDLLCR0_HCLKOUTDIS(cr0);
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writel(pdllcr0, &pmu->PDLLCR0);
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}
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