upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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357 lines
12 KiB
357 lines
12 KiB
/*
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* (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* config for XPedite1000 from XES Inc.
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* Ported from EBONY config by Travis B. Sawyer <tsawyer@sandburst.com>
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* (C) Copyright 2003 Sandburst Corporation
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* board/config_EBONY.h - configuration for AMCC 440GP Ref (Ebony)
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/* High Level Configuration Options */
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#define CONFIG_XPEDITE1000 1
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#define CONFIG_SYS_BOARD_NAME "XPedite1000"
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#define CONFIG_4xx 1 /* ... PPC4xx family */
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#define CONFIG_440 1
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#define CONFIG_440GX 1 /* 440 GX */
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#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
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#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
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#define CONFIG_SYS_TEXT_BASE 0xFFF80000
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/*
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* DDR config
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*/
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#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for setup */
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#define SPD_EEPROM_ADDRESS {0x54} /* SPD i2c spd addresses */
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#define CONFIG_VERY_BIG_RAM 1
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/*
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* Base addresses -- Note these are effective addresses where the
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* actual resources get mapped (not physical addresses)
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*/
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#define CONFIG_SYS_SDRAM_BASE 0x00000000
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#define CONFIG_SYS_FLASH_BASE 0xff000000 /* start of FLASH */
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
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#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */
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#define CONFIG_SYS_ISRAM_BASE 0xc0000000 /* internal SRAM */
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#define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */
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#define CONFIG_SYS_NVRAM_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x08000000)
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#define CONFIG_SYS_GPIO_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000700)
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/*
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* Diagnostics
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*/
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#define CONFIG_SYS_ALT_MEMTEST
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#define CONFIG_SYS_MEMTEST_START 0x0400000
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#define CONFIG_SYS_MEMTEST_END 0x0C00000
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/* POST support */
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#define CONFIG_POST (CONFIG_SYS_POST_RTC | \
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CONFIG_SYS_POST_I2C)
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/*
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* LED support
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*/
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#define USR_LED0 0x00000080
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#define USR_LED1 0x00000100
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#define USR_LED2 0x00000200
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#define USR_LED3 0x00000400
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#ifndef __ASSEMBLY__
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extern unsigned long in32(unsigned int);
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extern void out32(unsigned int, unsigned long);
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#define LED0_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED0))
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#define LED1_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED1))
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#define LED2_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED2))
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#define LED3_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED3))
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#define LED0_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED0))
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#define LED1_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED1))
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#define LED2_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED2))
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#define LED3_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED3))
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#endif
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/*
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* Use internal SRAM for initial stack
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*/
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#define CONFIG_SYS_TEMP_STACK_OCM 1
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#define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_ISRAM_BASE
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#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_ISRAM_BASE /* Initial RAM address */
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#define CONFIG_SYS_INIT_RAM_END 0x2000 /* End of used area in RAM */
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#define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */
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#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
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#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 KB for Mon */
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#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */
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/*
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* Serial Port
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*/
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#define CONFIG_CONS_INDEX 1 /* Use UART0 */
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE 1
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#define CONFIG_SYS_NS16550_CLK get_serial_clock()
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#define CONFIG_SYS_BAUDRATE_TABLE \
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{300, 600, 1200, 2400, 4800, 9600, 19200, 38400}
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
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#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
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/*
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* Use the HUSH parser
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*/
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#define CONFIG_SYS_HUSH_PARSER
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#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
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/*
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* NOR flash configuration
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*/
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#define CONFIG_SYS_MAX_FLASH_BANKS 3
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#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE, 0xf0000000, 0xf4000000 }
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#define CONFIG_SYS_MAX_FLASH_SECT 512 /* sectors per device */
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#define CONFIG_FLASH_CFI_DRIVER
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#define CONFIG_SYS_FLASH_CFI
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#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
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#define CONFIG_SYS_FLASH_QUIET_TEST /* MirrorBit flashes are optional */
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#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
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#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
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/*
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* I2C
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*/
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#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
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#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
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#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
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#define CONFIG_SYS_I2C_SLAVE 0x7f
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#define CONFIG_I2C_MULTI_BUS
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/* I2C EEPROM */
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
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/* I2C RTC: STMicro M41T00 */
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#define CONFIG_RTC_M41T11 1
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#define CONFIG_SYS_I2C_RTC_ADDR 0x68
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#define CONFIG_SYS_M41T11_BASE_YEAR 2000
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/*
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* PCI
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*/
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/* General PCI */
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#define CONFIG_PCI /* include pci support */
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#define CONFIG_PCI_PNP /* do pci plug-and-play */
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#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
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#define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE */
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/* Board-specific PCI */
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#define CONFIG_SYS_PCI_TARGET_INIT /* let board init pci target */
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#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1014 /* IBM */
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#define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0xcafe /* Whatever */
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#define CONFIG_SYS_PCI_FORCE_PCI_CONV /* Force PCI Conventional Mode */
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/*
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* Networking options
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*/
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#define CONFIG_PPC4xx_EMAC
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#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
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#define CONFIG_NET_MULTI 1
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_PHY_RESET 1 /* reset phy upon startup */
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#define CONFIG_SYS_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
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#define CONFIG_ETHPRIME "ppc_4xx_eth2"
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#define CONFIG_PHY_ADDR 4 /* PHY address phy0 not populated */
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#define CONFIG_PHY2_ADDR 4 /* PHY address phy2 */
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#define CONFIG_HAS_ETH2 1 /* add support for "eth2addr" */
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#define CONFIG_PHY3_ADDR 8 /* PHY address phy3 */
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#define CONFIG_HAS_ETH3 1 /* add support for "eth3addr" */
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/* BOOTP options */
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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/*
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* Command configuration
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*/
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#include <config_cmd_default.h>
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#define CONFIG_CMD_ASKENV
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#define CONFIG_CMD_DATE
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_EEPROM
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#define CONFIG_CMD_ELF
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#define CONFIG_CMD_FLASH
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#define CONFIG_CMD_I2C
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#define CONFIG_CMD_IRQ
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#define CONFIG_CMD_JFFS2
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#define CONFIG_CMD_MII
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#define CONFIG_CMD_NET
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#define CONFIG_CMD_PCI
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_SAVEENV
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#define CONFIG_CMD_SNTP
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/*
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
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#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
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#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
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#define CONFIG_CMDLINE_EDITING 1 /* Command-line editing */
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#define CONFIG_BOOTDELAY 3 /* -1 disables auto-boot */
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#define CONFIG_PANIC_HANG /* do not reset board on panic */
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#define CONFIG_PREBOOT /* enable preboot variable */
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#define CONFIG_FIT 1
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#define CONFIG_FIT_VERBOSE 1
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#define CONFIG_INTEGRITY /* support booting INTEGRITY OS */
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#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
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/*
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* For booting Linux, the board info and command line data
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* have to be in the first 8 MB of memory, since this is
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* the maximum mapped by the Linux kernel during initialization.
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*/
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#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
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/*
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* Environment Configuration
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*/
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#define CONFIG_ENV_IS_IN_FLASH 1
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#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128k (one sector) for env */
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#define CONFIG_ENV_SIZE 0x8000
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#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - (256 * 1024))
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/*
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* Flash memory map:
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* fff80000 - ffffffff U-Boot (512 KB)
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* fff40000 - fff7ffff U-Boot Environment (256 KB)
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* fff00000 - fff3ffff FDT (256KB)
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* ffc00000 - ffefffff OS image (3MB)
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* ff000000 - ffbfffff OS Use/Filesystem (12MB)
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*/
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#define CONFIG_UBOOT_ENV_ADDR MK_STR(CONFIG_SYS_TEXT_BASE)
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#define CONFIG_FDT_ENV_ADDR MK_STR(0xfff00000)
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#define CONFIG_OS_ENV_ADDR MK_STR(0xffc00000)
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#define CONFIG_PROG_UBOOT \
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"$download_cmd $loadaddr $ubootfile; " \
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"if test $? -eq 0; then " \
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"protect off "CONFIG_UBOOT_ENV_ADDR" +80000; " \
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"erase "CONFIG_UBOOT_ENV_ADDR" +80000; " \
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"cp.w $loadaddr "CONFIG_UBOOT_ENV_ADDR" 40000; " \
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"protect on "CONFIG_UBOOT_ENV_ADDR" +80000; " \
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"cmp.b $loadaddr "CONFIG_UBOOT_ENV_ADDR" 80000; " \
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"if test $? -ne 0; then " \
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"echo PROGRAM FAILED; " \
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"else; " \
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"echo PROGRAM SUCCEEDED; " \
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"fi; " \
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"else; " \
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"echo DOWNLOAD FAILED; " \
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"fi;"
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#define CONFIG_BOOT_OS_NET \
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"$download_cmd $osaddr $osfile; " \
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"if test $? -eq 0; then " \
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"if test -n $fdtaddr; then " \
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"$download_cmd $fdtaddr $fdtfile; " \
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"if test $? -eq 0; then " \
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"bootm $osaddr - $fdtaddr; " \
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"else; " \
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"echo FDT DOWNLOAD FAILED; " \
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"fi; " \
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"else; " \
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"bootm $osaddr; " \
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"fi; " \
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"else; " \
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"echo OS DOWNLOAD FAILED; " \
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"fi;"
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#define CONFIG_PROG_OS \
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"$download_cmd $osaddr $osfile; " \
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"if test $? -eq 0; then " \
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"erase "CONFIG_OS_ENV_ADDR" +$filesize; " \
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"cp.b $osaddr "CONFIG_OS_ENV_ADDR" $filesize; " \
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"cmp.b $osaddr "CONFIG_OS_ENV_ADDR" $filesize; " \
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"if test $? -ne 0; then " \
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"echo OS PROGRAM FAILED; " \
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"else; " \
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"echo OS PROGRAM SUCCEEDED; " \
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"fi; " \
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"else; " \
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"echo OS DOWNLOAD FAILED; " \
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"fi;"
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#define CONFIG_PROG_FDT \
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"$download_cmd $fdtaddr $fdtfile; " \
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"if test $? -eq 0; then " \
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"erase "CONFIG_FDT_ENV_ADDR" +$filesize;" \
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"cp.b $fdtaddr "CONFIG_FDT_ENV_ADDR" $filesize; " \
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"cmp.b $fdtaddr "CONFIG_FDT_ENV_ADDR" $filesize; " \
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"if test $? -ne 0; then " \
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"echo FDT PROGRAM FAILED; " \
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"else; " \
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"echo FDT PROGRAM SUCCEEDED; " \
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"fi; " \
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"else; " \
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"echo FDT DOWNLOAD FAILED; " \
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"fi;"
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"autoload=yes\0" \
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"download_cmd=tftp\0" \
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"console_args=console=ttyS0,115200\0" \
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"root_args=root=/dev/nfs rw\0" \
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"misc_args=ip=on\0" \
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"set_bootargs=setenv bootargs ${console_args} ${root_args} ${misc_args}\0" \
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"bootfile=/home/user/file\0" \
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"osfile=/home/user/uImage-XPedite1000\0" \
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"fdtfile=/home/user/xpedite1000.dtb\0" \
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"ubootfile=/home/user/u-boot.bin\0" \
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"fdtaddr=c00000\0" \
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"osaddr=0x1000000\0" \
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"loadaddr=0x1000000\0" \
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"prog_uboot="CONFIG_PROG_UBOOT"\0" \
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"prog_os="CONFIG_PROG_OS"\0" \
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"prog_fdt="CONFIG_PROG_FDT"\0" \
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"bootcmd_net=run set_bootargs; "CONFIG_BOOT_OS_NET"\0" \
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"bootcmd_flash=run set_bootargs; " \
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"bootm "CONFIG_OS_ENV_ADDR" - "CONFIG_FDT_ENV_ADDR"\0" \
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"bootcmd=run bootcmd_flash\0"
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#endif /* __CONFIG_H */
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