upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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422 lines
11 KiB
422 lines
11 KiB
/**
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* @file IxFeatureCtrl.c
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*
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* @author Intel Corporation
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* @date 29-Jan-2003
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*
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* @brief Feature Control Public API Implementation
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*
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*
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* @par
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* IXP400 SW Release version 2.0
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*
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* -- Copyright Notice --
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*
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* @par
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* Copyright 2001-2005, Intel Corporation.
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* All rights reserved.
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*
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* @par
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Intel Corporation nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* @par
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @par
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* -- End of Copyright Notice --
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*/
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#include "IxOsal.h"
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#include "IxVersionId.h"
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#include "IxFeatureCtrl.h"
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/* Macro to read from the Feature Control Register */
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#define IX_FEATURE_CTRL_READ(result) \
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do { \
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ixFeatureCtrlExpMap(); \
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(result) = IX_OSAL_READ_LONG(ixFeatureCtrlRegister); \
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} while (0)
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/* Macro to write to the Feature Control Register */
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#define IX_FEATURE_CTRL_WRITE(value) \
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do { \
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ixFeatureCtrlExpMap(); \
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IX_OSAL_WRITE_LONG(ixFeatureCtrlRegister, (value)); \
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} while (0)
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/*
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* This is the offset of the feature register relative to the base of the
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* Expansion Bus Controller MMR.
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*/
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#define IX_FEATURE_CTRL_REG_OFFSET (0x00000028)
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/* Boolean to mark the fact that the EXP_CONFIG address space was mapped */
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PRIVATE BOOL ixFeatureCtrlExpCfgRegionMapped = false;
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/* Pointer holding the virtual address of the Feature Control Register */
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PRIVATE VUINT32 *ixFeatureCtrlRegister = NULL;
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/* Place holder to store the software configuration */
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PRIVATE BOOL swConfiguration[IX_FEATURECTRL_SWCONFIG_MAX];
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/* Flag to control swConfiguration[] is initialized once */
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PRIVATE BOOL swConfigurationFlag = false ;
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/* Array containing component mask values */
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#ifdef __ixp42X
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UINT32 componentMask[IX_FEATURECTRL_MAX_COMPONENTS] = {
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(0x1<<IX_FEATURECTRL_RCOMP),
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(0x1<<IX_FEATURECTRL_USB),
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(0x1<<IX_FEATURECTRL_HASH),
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(0x1<<IX_FEATURECTRL_AES),
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(0x1<<IX_FEATURECTRL_DES),
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(0x1<<IX_FEATURECTRL_HDLC),
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(0x1<<IX_FEATURECTRL_AAL),
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(0x1<<IX_FEATURECTRL_HSS),
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(0x1<<IX_FEATURECTRL_UTOPIA),
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(0x1<<IX_FEATURECTRL_ETH0),
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(0x1<<IX_FEATURECTRL_ETH1),
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(0x1<<IX_FEATURECTRL_NPEA),
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(0x1<<IX_FEATURECTRL_NPEB),
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(0x1<<IX_FEATURECTRL_NPEC),
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(0x1<<IX_FEATURECTRL_PCI),
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IX_FEATURECTRL_COMPONENT_NOT_AVAILABLE,
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(0x3<<IX_FEATURECTRL_UTOPIA_PHY_LIMIT),
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(0x1<<IX_FEATURECTRL_UTOPIA_PHY_LIMIT_BIT2),
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IX_FEATURECTRL_COMPONENT_NOT_AVAILABLE,
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IX_FEATURECTRL_COMPONENT_NOT_AVAILABLE,
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IX_FEATURECTRL_COMPONENT_NOT_AVAILABLE,
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IX_FEATURECTRL_COMPONENT_NOT_AVAILABLE,
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IX_FEATURECTRL_COMPONENT_NOT_AVAILABLE
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};
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#elif defined (__ixp46X)
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UINT32 componentMask[IX_FEATURECTRL_MAX_COMPONENTS] = {
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(0x1<<IX_FEATURECTRL_RCOMP),
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(0x1<<IX_FEATURECTRL_USB),
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(0x1<<IX_FEATURECTRL_HASH),
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(0x1<<IX_FEATURECTRL_AES),
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(0x1<<IX_FEATURECTRL_DES),
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(0x1<<IX_FEATURECTRL_HDLC),
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IX_FEATURECTRL_COMPONENT_ALWAYS_AVAILABLE, /* AAL component is always on */
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(0x1<<IX_FEATURECTRL_HSS),
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(0x1<<IX_FEATURECTRL_UTOPIA),
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(0x1<<IX_FEATURECTRL_ETH0),
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(0x1<<IX_FEATURECTRL_ETH1),
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(0x1<<IX_FEATURECTRL_NPEA),
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(0x1<<IX_FEATURECTRL_NPEB),
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(0x1<<IX_FEATURECTRL_NPEC),
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(0x1<<IX_FEATURECTRL_PCI),
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(0x1<<IX_FEATURECTRL_ECC_TIMESYNC),
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(0x3<<IX_FEATURECTRL_UTOPIA_PHY_LIMIT),
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(0x1<<IX_FEATURECTRL_UTOPIA_PHY_LIMIT_BIT2), /* NOT TO BE USED */
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(0x1<<IX_FEATURECTRL_USB_HOST_CONTROLLER),
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(0x1<<IX_FEATURECTRL_NPEA_ETH),
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(0x1<<IX_FEATURECTRL_NPEB_ETH),
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(0x1<<IX_FEATURECTRL_RSA),
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(0x3<<IX_FEATURECTRL_XSCALE_MAX_FREQ),
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(0x1<<IX_FEATURECTRL_XSCALE_MAX_FREQ_BIT2)
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};
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#endif /* __ixp42X */
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/**
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* Forward declaration
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*/
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PRIVATE
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void ixFeatureCtrlExpMap(void);
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PRIVATE
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void ixFeatureCtrlSwConfigurationInit(void);
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/**
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* Function to map EXP_CONFIG space
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*/
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PRIVATE
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void ixFeatureCtrlExpMap(void)
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{
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UINT32 expCfgBaseAddress = 0;
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/* If the EXP Configuration space has already been mapped then
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* return */
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if (ixFeatureCtrlExpCfgRegionMapped == true)
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{
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return;
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}
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/* Map (get virtual address) for the EXP_CONFIG space */
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expCfgBaseAddress = (UINT32)
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(IX_OSAL_MEM_MAP(IX_OSAL_IXP400_EXP_BUS_REGS_PHYS_BASE,
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IX_OSAL_IXP400_EXP_REG_MAP_SIZE));
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/* Assert that the mapping operation succeeded */
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IX_OSAL_ASSERT(expCfgBaseAddress);
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/* Set the address of the Feature register */
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ixFeatureCtrlRegister =
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(VUINT32 *) (expCfgBaseAddress + IX_FEATURE_CTRL_REG_OFFSET);
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/* Mark the fact that the EXP_CONFIG space has already been mapped */
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ixFeatureCtrlExpCfgRegionMapped = true;
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}
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/**
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* Function definition: ixFeatureCtrlSwConfigurationInit
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* This function will only initialize software configuration once.
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*/
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PRIVATE void ixFeatureCtrlSwConfigurationInit(void)
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{
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UINT32 i;
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if (false == swConfigurationFlag)
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{
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for (i=0; i<IX_FEATURECTRL_SWCONFIG_MAX ; i++)
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{
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/* By default, all software configuration are enabled */
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swConfiguration[i]= true ;
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}
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/*Make sure this function only initializes swConfiguration[] once*/
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swConfigurationFlag = true ;
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}
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}
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/**
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* Function definition: ixFeatureCtrlRead
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*/
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IxFeatureCtrlReg
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ixFeatureCtrlRead (void)
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{
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IxFeatureCtrlReg result;
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#if CPU!=SIMSPARCSOLARIS
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/* Read the feature control register */
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IX_FEATURE_CTRL_READ(result);
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return result;
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#else
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/* Return an invalid value for VxWorks simulation */
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result = 0xFFFFFFFF;
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return result;
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#endif
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}
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/**
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* Function definition: ixFeatureCtrlWrite
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*/
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void
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ixFeatureCtrlWrite (IxFeatureCtrlReg expUnitReg)
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{
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#if CPU!=SIMSPARCSOLARIS
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/* Write value to feature control register */
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IX_FEATURE_CTRL_WRITE(expUnitReg);
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#endif
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}
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/**
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* Function definition: ixFeatureCtrlHwCapabilityRead
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*/
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IxFeatureCtrlReg
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ixFeatureCtrlHwCapabilityRead (void)
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{
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IxFeatureCtrlReg currentReg, hwCapability;
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/* Capture a copy of feature control register */
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currentReg = ixFeatureCtrlRead();
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/* Try to enable all hardware components.
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* Only software disable hardware can be enabled again */
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ixFeatureCtrlWrite(0);
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/* Read feature control register to know the hardware capability. */
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hwCapability = ixFeatureCtrlRead();
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/* Restore initial feature control value */
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ixFeatureCtrlWrite(currentReg);
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/* return Hardware Capability */
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return hwCapability;
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}
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/**
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* Function definition: ixFeatureCtrlComponentCheck
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*/
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IX_STATUS
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ixFeatureCtrlComponentCheck (IxFeatureCtrlComponentType componentType)
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{
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IxFeatureCtrlReg expUnitReg;
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UINT32 mask = 0;
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/* Lookup mask of component */
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mask=componentMask[componentType];
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/* Check if mask is available or not */
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if(IX_FEATURECTRL_COMPONENT_NOT_AVAILABLE == mask)
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{
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return IX_FEATURE_CTRL_COMPONENT_DISABLED;
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}
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if(IX_FEATURECTRL_COMPONENT_ALWAYS_AVAILABLE == mask)
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{
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return IX_FEATURE_CTRL_COMPONENT_ENABLED;
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}
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/* Read feature control register to know current hardware capability. */
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expUnitReg = ixFeatureCtrlRead();
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/* For example: To check for Hashing Coprocessor (bit-2)
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* expUniteg = 0x0010
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* ~expUnitReg = 0x1101
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* componentType = 0x0100
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* ~expUnitReg & componentType = 0x0100 (Not zero)
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*/
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/*
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* Inverse the bit value because available component is 0 in value
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*/
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expUnitReg = ~expUnitReg ;
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if (expUnitReg & mask)
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{
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return (IX_FEATURE_CTRL_COMPONENT_ENABLED);
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}
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else
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{
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return (IX_FEATURE_CTRL_COMPONENT_DISABLED);
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}
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}
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/**
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* Function definition: ixFeatureCtrlProductIdRead
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*/
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IxFeatureCtrlProductId
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ixFeatureCtrlProductIdRead ()
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{
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#if CPU!=SIMSPARCSOLARIS
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IxFeatureCtrlProductId pdId = 0 ;
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/* Use ARM instruction to move register0 from coprocessor to ARM register */
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#ifndef __wince
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__asm__("mrc p15, 0, %0, cr0, cr0, 0;" : "=r"(pdId) :);
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#else
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#ifndef IN_KERNEL
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BOOL mode;
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#endif
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extern IxFeatureCtrlProductId AsmixFeatureCtrlProductIdRead();
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#ifndef IN_KERNEL
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mode = SetKMode(true);
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#endif
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pdId = AsmixFeatureCtrlProductIdRead();
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#ifndef IN_KERNEL
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SetKMode(mode);
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#endif
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#endif
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return (pdId);
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#else
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/* Return an invalid value for VxWorks simulation */
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return 0xffffffff;
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#endif
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}
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/**
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* Function definition: ixFeatureCtrlDeviceRead
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*/
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IxFeatureCtrlDeviceId
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ixFeatureCtrlDeviceRead ()
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{
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return ((ixFeatureCtrlProductIdRead() >> IX_FEATURE_CTRL_DEVICE_TYPE_OFFSET)
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& IX_FEATURE_CTRL_DEVICE_TYPE_MASK);
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} /* End function ixFeatureCtrlDeviceRead */
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/**
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* Function definition: ixFeatureCtrlSwConfigurationCheck
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*/
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IX_STATUS
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ixFeatureCtrlSwConfigurationCheck (IxFeatureCtrlSwConfig swConfigType)
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{
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if (swConfigType >= IX_FEATURECTRL_SWCONFIG_MAX)
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{
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ixOsalLog(IX_OSAL_LOG_LVL_WARNING,
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IX_OSAL_LOG_DEV_STDOUT,
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"FeatureCtrl: Invalid software configuraiton input.\n",
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0, 0, 0, 0, 0, 0);
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return IX_FEATURE_CTRL_SWCONFIG_DISABLED;
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}
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/* The function will only initialize once. */
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ixFeatureCtrlSwConfigurationInit();
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/* Check and return software configuration */
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return ((swConfiguration[(UINT32)swConfigType] == true) ? IX_FEATURE_CTRL_SWCONFIG_ENABLED: IX_FEATURE_CTRL_SWCONFIG_DISABLED);
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}
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/**
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* Function definition: ixFeatureCtrlSwConfigurationWrite
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*/
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void
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ixFeatureCtrlSwConfigurationWrite (IxFeatureCtrlSwConfig swConfigType, BOOL enabled)
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{
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if (swConfigType >= IX_FEATURECTRL_SWCONFIG_MAX)
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{
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ixOsalLog(IX_OSAL_LOG_LVL_WARNING,
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IX_OSAL_LOG_DEV_STDOUT,
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"FeatureCtrl: Invalid software configuraiton input.\n",
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0, 0, 0, 0, 0, 0);
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return;
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}
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/* The function will only initialize once. */
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ixFeatureCtrlSwConfigurationInit();
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/* Write software configuration */
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swConfiguration[(UINT32)swConfigType]=enabled ;
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}
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/**
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* Function definition: ixFeatureCtrlIxp400SwVersionShow
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*/
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void
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ixFeatureCtrlIxp400SwVersionShow (void)
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{
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printf ("\nIXP400 Software Release %s %s\n\n", IX_VERSION_ID, IX_VERSION_INTERNAL_ID);
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}
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/**
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* Function definition: ixFeatureCtrlSoftwareBuildGet
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*/
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IxFeatureCtrlBuildDevice
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ixFeatureCtrlSoftwareBuildGet (void)
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{
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#ifdef __ixp42X
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return IX_FEATURE_CTRL_SW_BUILD_IXP42X;
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#else
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return IX_FEATURE_CTRL_SW_BUILD_IXP46X;
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#endif
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}
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