upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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44 lines
1.4 KiB
44 lines
1.4 KiB
/*
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* mpc823_lcd.h - MPC823 LCD Controller structures
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*
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* (C) Copyright 2001
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _MPC823_LCD_H_
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#define _MPC823_LCD_H_
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/*
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* LCD controller stucture for MPC823 CPU
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*/
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typedef struct vidinfo {
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ushort vl_col; /* Number of columns (i.e. 640) */
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ushort vl_row; /* Number of rows (i.e. 480) */
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ushort vl_rot; /* Rotation of Display (0, 1, 2, 3) */
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ushort vl_width; /* Width of display area in millimeters */
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ushort vl_height; /* Height of display area in millimeters */
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/* LCD configuration register */
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u_char vl_clkp; /* Clock polarity */
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u_char vl_oep; /* Output Enable polarity */
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u_char vl_hsp; /* Horizontal Sync polarity */
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u_char vl_vsp; /* Vertical Sync polarity */
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u_char vl_dp; /* Data polarity */
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u_char vl_bpix; /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8 */
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u_char vl_lbw; /* LCD Bus width, 0 = 4, 1 = 8 */
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u_char vl_splt; /* Split display, 0 = single-scan, 1 = dual-scan */
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u_char vl_clor; /* Color, 0 = mono, 1 = color */
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u_char vl_tft; /* 0 = passive, 1 = TFT */
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/* Horizontal control register. Timing from data sheet */
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ushort vl_wbl; /* Wait between lines */
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/* Vertical control register */
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u_char vl_vpw; /* Vertical sync pulse width */
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u_char vl_lcdac; /* LCD AC timing */
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u_char vl_wbf; /* Wait between frames */
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} vidinfo_t;
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#endif
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