upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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202 lines
9.3 KiB
202 lines
9.3 KiB
/*
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* (C) Copyright 2009 Reinhard Arlt, reinhard.arlt@esd-electronics.com
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*
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* base on universe.h by
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*
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* (C) Copyright 2003 Stefan Roese, stefan.roese@esd-electronics.com
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _tsi148_h
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#define _tsi148_h
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#ifndef PCI_DEVICE_ID_TUNDRA_TSI148
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#define PCI_DEVICE_ID_TUNDRA_TSI148 0x0148
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#endif
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typedef struct _TSI148 TSI148;
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typedef struct _OUTBOUND OUTBOUND;
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typedef struct _INBOUND INBOUND;
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typedef struct _TDMA_CMD_PACKET TDMA_CMD_PACKET;
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struct _OUTBOUND {
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unsigned int otsau; /* 0x000 Outbound start upper */
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unsigned int otsal; /* 0x004 Outbouud start lower */
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unsigned int oteau; /* 0x008 Outbound end upper */
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unsigned int oteal; /* 0x00c Outbound end lower */
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unsigned int otofu; /* 0x010 Outbound translation upper */
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unsigned int otofl; /* 0x014 Outbound translation lower */
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unsigned int otbs; /* 0x018 Outbound translation 2eSST */
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unsigned int otat; /* 0x01c Outbound translation attr */
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};
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struct _INBOUND {
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unsigned int itsau; /* 0x000 inbound start upper */
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unsigned int itsal; /* 0x004 inbouud start lower */
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unsigned int iteau; /* 0x008 inbound end upper */
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unsigned int iteal; /* 0x00c inbound end lower */
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unsigned int itofu; /* 0x010 inbound translation upper */
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unsigned int itofl; /* 0x014 inbound translation lower */
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unsigned int itat; /* 0x018 inbound translation attr */
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unsigned int spare; /* 0x01c not used */
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};
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struct _TSI148 {
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unsigned int pci_id; /* 0x000 */
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unsigned int pci_csr; /* 0x004 */
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unsigned int pci_class; /* 0x008 */
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unsigned int pci_misc0; /* 0x00c */
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unsigned int pci_mbarl; /* 0x010 */
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unsigned int pci_mbarh; /* 0x014 */
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unsigned int spare0[(0x03c-0x018)/4]; /* 0x018 */
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unsigned int pci_misc1; /* 0x03c */
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unsigned int pci_pcixcap; /* 0x040 */
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unsigned int pci_pcixstat; /* 0x044 */
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unsigned int spare1[(0x100-0x048)/4]; /* 0x048 */
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OUTBOUND outbound[8]; /* 0x100 */
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unsigned int viack[8]; /* 0x204 */
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unsigned int rmwau; /* 0x220 */
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unsigned int rmwal; /* 0x224 */
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unsigned int rmwen; /* 0x228 */
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unsigned int rmwc; /* 0x22c */
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unsigned int rmws; /* 0x230 */
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unsigned int vmctrl; /* 0x234 */
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unsigned int vctrl; /* 0x238 */
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unsigned int vstat; /* 0x23c */
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unsigned int pcsr; /* 0x240 */
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unsigned int spare2[3]; /* 0x244 - 0x24c */
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unsigned int vmefl; /* 0x250 */
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unsigned int spare3[3]; /* 0x254 - 0x25c */
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unsigned int veau; /* 0x260 */
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unsigned int veal; /* 0x264 */
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unsigned int veat; /* 0x268 */
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unsigned int spare4[1]; /* 0x26c */
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unsigned int edpau; /* 0x270 */
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unsigned int edpal; /* 0x274 */
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unsigned int edpxa; /* 0x278 */
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unsigned int edpxs; /* 0x27c */
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unsigned int edpat; /* 0x280 */
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unsigned int spare5[31]; /* 0x284 - 0x2fc */
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INBOUND inbound[8]; /* 0x100 */
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unsigned int gbau; /* 0x400 */
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unsigned int gbal; /* 0x404 */
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unsigned int gcsrat; /* 0x408 */
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unsigned int cbau; /* 0x40c */
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unsigned int cbal; /* 0x410 */
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unsigned int crgat; /* 0x414 */
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unsigned int crou; /* 0x418 */
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unsigned int crol; /* 0x41c */
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unsigned int crat; /* 0x420 */
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unsigned int lmbau; /* 0x424 */
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unsigned int lmbal; /* 0x428 */
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unsigned int lmat; /* 0x42c */
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unsigned int r64bcu; /* 0x430 */
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unsigned int r64bcl; /* 0x434 */
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unsigned int bpgtr; /* 0x438 */
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unsigned int bpctr; /* 0x43c */
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unsigned int vicr; /* 0x440 */
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unsigned int spare6[1]; /* 0x444 */
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unsigned int inten; /* 0x448 */
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unsigned int inteo; /* 0x44c */
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unsigned int ints; /* 0x450 */
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unsigned int intc; /* 0x454 */
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unsigned int intm1; /* 0x458 */
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unsigned int intm2; /* 0x45c */
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unsigned int spare7[40]; /* 0x460 - 0x4fc */
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unsigned int dctl0; /* 0x500 */
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unsigned int dsta0; /* 0x504 */
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unsigned int dcsau0; /* 0x508 */
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unsigned int dcsal0; /* 0x50c */
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unsigned int dcdau0; /* 0x510 */
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unsigned int dcdal0; /* 0x514 */
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unsigned int dclau0; /* 0x518 */
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unsigned int dclal0; /* 0x51c */
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unsigned int dsau0; /* 0x520 */
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unsigned int dsal0; /* 0x524 */
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unsigned int ddau0; /* 0x528 */
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unsigned int ddal0; /* 0x52c */
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unsigned int dsat0; /* 0x530 */
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unsigned int ddat0; /* 0x534 */
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unsigned int dnlau0; /* 0x538 */
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unsigned int dnlal0; /* 0x53c */
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unsigned int dcnt0; /* 0x540 */
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unsigned int ddbs0; /* 0x544 */
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unsigned int r20[14]; /* 0x548 - 0x57c */
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unsigned int dctl1; /* 0x580 */
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unsigned int dsta1; /* 0x584 */
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unsigned int dcsau1; /* 0x588 */
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unsigned int dcsal1; /* 0x58c */
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unsigned int dcdau1; /* 0x590 */
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unsigned int dcdal1; /* 0x594 */
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unsigned int dclau1; /* 0x598 */
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unsigned int dclal1; /* 0x59c */
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unsigned int dsau1; /* 0x5a0 */
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unsigned int dsal1; /* 0x5a4 */
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unsigned int ddau1; /* 0x5a8 */
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unsigned int ddal1; /* 0x5ac */
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unsigned int dsat1; /* 0x5b0 */
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unsigned int ddat1; /* 0x5b4 */
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unsigned int dnlau1; /* 0x5b8 */
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unsigned int dnlal1; /* 0x5bc */
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unsigned int dcnt1; /* 0x5c0 */
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unsigned int ddbs1; /* 0x5c4 */
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unsigned int r21[14]; /* 0x5c8 - 0x5fc */
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unsigned int devi_veni_2; /* 0x600 */
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unsigned int gctrl_ga_revid; /* 0x604 */
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unsigned int semaphore0_1_2_3; /* 0x608 */
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unsigned int semaphore4_5_6_7; /* 0x60c */
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unsigned int mbox0; /* 0x610 */
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unsigned int mbox1; /* 0x614 */
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unsigned int mbox2; /* 0x618 */
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unsigned int mbox3; /* 0x61c */
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unsigned int r22[629]; /* 0x620 - 0xff0 */
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unsigned int csrbcr; /* 0xff4 */
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unsigned int csrbsr; /* 0xff8 */
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unsigned int cbar; /* 0xffc */
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};
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#define IRQ_VOWN 0x0001
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#define IRQ_VIRQ1 0x0002
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#define IRQ_VIRQ2 0x0004
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#define IRQ_VIRQ3 0x0008
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#define IRQ_VIRQ4 0x0010
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#define IRQ_VIRQ5 0x0020
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#define IRQ_VIRQ6 0x0040
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#define IRQ_VIRQ7 0x0080
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#define IRQ_DMA 0x0100
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#define IRQ_LERR 0x0200
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#define IRQ_VERR 0x0400
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#define IRQ_res 0x0800
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#define IRQ_IACK 0x1000
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#define IRQ_SWINT 0x2000
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#define IRQ_SYSFAIL 0x4000
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#define IRQ_ACFAIL 0x8000
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struct _TDMA_CMD_PACKET {
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unsigned int dctl; /* DMA Control */
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unsigned int dtbc; /* Transfer Byte Count */
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unsigned int dlv; /* PCI Address */
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unsigned int res1; /* Reserved */
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unsigned int dva; /* Vme Address */
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unsigned int res2; /* Reserved */
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unsigned int dcpp; /* Pointer to Numed Cmd Packet with rPN */
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unsigned int res3; /* Reserved */
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};
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#define VME_AM_A16 0x01
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#define VME_AM_A24 0x02
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#define VME_AM_A32 0x03
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#define VME_AM_Axx 0x03
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#define VME_AM_USR 0x04
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#define VME_AM_SUP 0x08
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#define VME_AM_DATA 0x10
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#define VME_AM_PROG 0x20
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#define VME_AM_Mxx (VME_AM_DATA | VME_AM_PROG)
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#define VME_FLAG_D8 0x01
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#define VME_FLAG_D16 0x02
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#define VME_FLAG_D32 0x03
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#define VME_FLAG_Dxx 0x03
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#endif
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