upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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128 lines
3.2 KiB
128 lines
3.2 KiB
/*
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* OpenRISC Linux
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*
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* Linux architectural port borrowing liberally from similar works of
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* others. All original copyrights apply as per the original source
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* declaration.
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*
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* OpenRISC implementation:
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* Copyright (C) 2003 Matjaz Breskvar <phoenix@bsemi.com>
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* Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>
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* et al.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ASM_OPENRISC_PTRACE_H
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#define __ASM_OPENRISC_PTRACE_H
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#include <asm/spr-defs.h>
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#ifndef __ASSEMBLY__
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/*
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* This is the layout of the regset returned by the GETREGSET ptrace call
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*/
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struct user_regs_struct {
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/* GPR R0-R31... */
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unsigned long gpr[32];
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unsigned long pc;
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unsigned long sr;
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unsigned long pad1;
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unsigned long pad2;
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};
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#endif
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#ifdef __KERNEL__
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/*
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* Make kernel PTrace/register structures opaque to userspace... userspace can
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* access thread state via the regset mechanism. This allows us a bit of
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* flexibility in how we order the registers on the stack, permitting some
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* optimizations like packing call-clobbered registers together so that
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* they share a cacheline (not done yet, though... future optimization).
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*/
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#ifndef __ASSEMBLY__
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/*
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* This struct describes how the registers are laid out on the kernel stack
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* during a syscall or other kernel entry.
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*
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* This structure should always be cacheline aligned on the stack.
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* FIXME: I don't think that's the case right now. The alignment is
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* taken care of elsewhere... head.S, process.c, etc.
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*/
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struct pt_regs {
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union {
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struct {
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/* Named registers */
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long sr; /* Stored in place of r0 */
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long sp; /* r1 */
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};
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struct {
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/* Old style */
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long offset[2];
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long gprs[30];
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};
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struct {
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/* New style */
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long gpr[32];
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};
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};
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long pc;
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long orig_gpr11; /* For restarting system calls */
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long syscallno; /* Syscall number (used by strace) */
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long dummy; /* Cheap alignment fix */
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};
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#endif /* __ASSEMBLY__ */
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/* TODO: Rename this to REDZONE because that's what it is */
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#define STACK_FRAME_OVERHEAD 128 /* size of minimum stack frame */
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#define instruction_pointer(regs) ((regs)->pc)
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#define user_mode(regs) (((regs)->sr & SPR_SR_SM) == 0)
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#define user_stack_pointer(regs) ((unsigned long)(regs)->sp)
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#define profile_pc(regs) instruction_pointer(regs)
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/*
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* Offsets used by 'ptrace' system call interface.
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*/
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#define PT_SR 0
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#define PT_SP 4
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#define PT_GPR2 8
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#define PT_GPR3 12
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#define PT_GPR4 16
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#define PT_GPR5 20
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#define PT_GPR6 24
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#define PT_GPR7 28
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#define PT_GPR8 32
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#define PT_GPR9 36
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#define PT_GPR10 40
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#define PT_GPR11 44
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#define PT_GPR12 48
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#define PT_GPR13 52
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#define PT_GPR14 56
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#define PT_GPR15 60
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#define PT_GPR16 64
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#define PT_GPR17 68
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#define PT_GPR18 72
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#define PT_GPR19 76
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#define PT_GPR20 80
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#define PT_GPR21 84
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#define PT_GPR22 88
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#define PT_GPR23 92
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#define PT_GPR24 96
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#define PT_GPR25 100
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#define PT_GPR26 104
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#define PT_GPR27 108
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#define PT_GPR28 112
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#define PT_GPR29 116
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#define PT_GPR30 120
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#define PT_GPR31 124
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#define PT_PC 128
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#define PT_ORIG_GPR11 132
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#define PT_SYSCALLNO 136
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#endif /* __KERNEL__ */
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#endif /* __ASM_OPENRISC_PTRACE_H */
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