upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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136 lines
3.8 KiB
136 lines
3.8 KiB
/*
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* (C) Copyright 2008-2009
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* Heiko Schocher, DENX Software Engineering, hs@denx.de.
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*
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* (C) Copyright 2003-2005
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* High Level Configuration Options
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* (easy to change)
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*/
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#define CONFIG_MUCMC52 1 /* MUCMC52 board */
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#define CONFIG_HOSTNAME mucmc52
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#include "manroland/common.h"
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#include "manroland/mpc5200-common.h"
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#define CONFIG_LAST_STAGE_INIT
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/*
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* Serial console configuration
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*/
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#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
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#define CONFIG_CMD_PCI
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/*
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* Flash configuration
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*/
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#define CONFIG_SYS_MAX_FLASH_SECT 67
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/*
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* Environment settings
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*/
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#define CONFIG_ENV_SECT_SIZE 0x20000
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/*
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* Memory map
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*/
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#define CONFIG_SYS_STATUS1_BASE 0x80600200
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#define CONFIG_SYS_STATUS2_BASE 0x80600300
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#define CONFIG_SYS_PMI_UNI_BASE 0x80800000
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#define CONFIG_SYS_PMI_BROAD_BASE 0x80810000
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/*
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* GPIO configuration
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*/
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#define CONFIG_SYS_GPS_PORT_CONFIG 0x8D550644
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#define CONFIG_SYS_MEMTEST_START 0x00100000
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#define CONFIG_SYS_MEMTEST_END 0x00f00000
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#define CONFIG_SYS_LOAD_ADDR 0x100000
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#define CONFIG_SYS_BOOTCS_CFG 0x0004FB00
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/* 8Mbit SRAM @0x80100000 */
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#define CONFIG_SYS_CS1_SIZE 0x00100000
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#define CONFIG_SYS_CS1_CFG 0x00019B00
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/* FRAM 32Kbyte @0x80700000 */
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#define CONFIG_SYS_CS2_START 0x80700000
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#define CONFIG_SYS_CS2_SIZE 0x00008000
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#define CONFIG_SYS_CS2_CFG 0x00019800
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/* Display H1, Status Inputs, EPLD @0x80600000 */
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#define CONFIG_SYS_CS3_START 0x80600000
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#define CONFIG_SYS_CS3_SIZE 0x00100000
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#define CONFIG_SYS_CS3_CFG 0x00019800
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/* PMI Unicast 32Kbyte @0x80800000 */
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#define CONFIG_SYS_CS6_START CONFIG_SYS_PMI_UNI_BASE
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#define CONFIG_SYS_CS6_SIZE 0x00008000
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#define CONFIG_SYS_CS6_CFG 0xFFFFF930
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/* PMI Broadcast 32Kbyte @0x80810000 */
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#define CONFIG_SYS_CS7_START CONFIG_SYS_PMI_BROAD_BASE
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#define CONFIG_SYS_CS7_SIZE 0x00008000
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#define CONFIG_SYS_CS7_CFG 0xFF00F930
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/*-----------------------------------------------------------------------
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* IDE/ATA stuff Supports IDE harddisk
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*-----------------------------------------------------------------------
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*/
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#define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 2 drives per IDE bus */
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/*
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* PCI Mapping:
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* 0x40000000 - 0x4fffffff - PCI Memory
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* 0x50000000 - 0x50ffffff - PCI IO Space
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*/
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#define CONFIG_PCI 1
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#define CONFIG_PCI_PNP 1
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#define CONFIG_PCI_SCAN_SHOW 1
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#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
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#define CONFIG_PCI_MEM_BUS 0x40000000
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#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
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#define CONFIG_PCI_MEM_SIZE 0x10000000
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#define CONFIG_PCI_IO_BUS 0x50000000
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#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
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#define CONFIG_PCI_IO_SIZE 0x01000000
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#define CONFIG_SYS_ISA_IO CONFIG_PCI_IO_BUS
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/*---------------------------------------------------------------------*/
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/* Display addresses */
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/*---------------------------------------------------------------------*/
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#define CONFIG_SYS_DISP_CHR_RAM (CONFIG_SYS_DISPLAY_BASE + 0x38)
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#define CONFIG_SYS_DISP_CWORD (CONFIG_SYS_DISPLAY_BASE + 0x30)
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#endif /* __CONFIG_H */
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