upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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152 lines
3.4 KiB
152 lines
3.4 KiB
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Qualcomm EHCI driver
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*
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* (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
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*
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* Based on Linux driver
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <fdtdec.h>
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#include <linux/libfdt.h>
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#include <usb.h>
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#include <usb/ehci-ci.h>
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#include <usb/ulpi.h>
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#include <wait_bit.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <linux/compat.h>
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#include "ehci.h"
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struct msm_ehci_priv {
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struct ehci_ctrl ctrl; /* Needed by EHCI */
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struct usb_ehci *ehci; /* Start of IP core*/
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struct ulpi_viewport ulpi_vp; /* ULPI Viewport */
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struct phy phy;
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};
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static int msm_init_after_reset(struct ehci_ctrl *dev)
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{
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struct msm_ehci_priv *p = container_of(dev, struct msm_ehci_priv, ctrl);
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struct usb_ehci *ehci = p->ehci;
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generic_phy_reset(&p->phy);
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/* set mode to host controller */
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writel(CM_HOST, &ehci->usbmode);
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return 0;
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}
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static const struct ehci_ops msm_ehci_ops = {
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.init_after_reset = msm_init_after_reset
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};
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static int ehci_usb_probe(struct udevice *dev)
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{
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struct msm_ehci_priv *p = dev_get_priv(dev);
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struct usb_ehci *ehci = p->ehci;
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struct usb_platdata *plat = dev_get_platdata(dev);
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struct ehci_hccr *hccr;
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struct ehci_hcor *hcor;
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int ret;
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hccr = (struct ehci_hccr *)((phys_addr_t)&ehci->caplength);
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hcor = (struct ehci_hcor *)((phys_addr_t)hccr +
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HC_LENGTH(ehci_readl(&(hccr)->cr_capbase)));
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ret = ehci_setup_phy(dev, &p->phy, 0);
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if (ret)
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return ret;
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ret = board_usb_init(0, plat->init_type);
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if (ret < 0)
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return ret;
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return ehci_register(dev, hccr, hcor, &msm_ehci_ops, 0,
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plat->init_type);
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}
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static int ehci_usb_remove(struct udevice *dev)
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{
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struct msm_ehci_priv *p = dev_get_priv(dev);
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struct usb_ehci *ehci = p->ehci;
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int ret;
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ret = ehci_deregister(dev);
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if (ret)
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return ret;
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/* Stop controller. */
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clrbits_le32(&ehci->usbcmd, CMD_RUN);
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ret = ehci_shutdown_phy(dev, &p->phy);
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if (ret)
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return ret;
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ret = board_usb_init(0, USB_INIT_DEVICE); /* Board specific hook */
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if (ret < 0)
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return ret;
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/* Reset controller */
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setbits_le32(&ehci->usbcmd, CMD_RESET);
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/* Wait for reset */
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if (wait_for_bit_le32(&ehci->usbcmd, CMD_RESET, false, 30, false)) {
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printf("Stuck on USB reset.\n");
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return -ETIMEDOUT;
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}
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return 0;
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}
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static int ehci_usb_ofdata_to_platdata(struct udevice *dev)
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{
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struct msm_ehci_priv *priv = dev_get_priv(dev);
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priv->ulpi_vp.port_num = 0;
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priv->ehci = (void *)devfdt_get_addr(dev);
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if (priv->ehci == (void *)FDT_ADDR_T_NONE)
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return -EINVAL;
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/* Warning: this will not work if viewport address is > 64 bit due to
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* ULPI design.
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*/
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priv->ulpi_vp.viewport_addr = (phys_addr_t)&priv->ehci->ulpi_viewpoint;
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return 0;
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}
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#if defined(CONFIG_CI_UDC)
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/* Little quirk that MSM needs with Chipidea controller
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* Must reinit phy after reset
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*/
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void ci_init_after_reset(struct ehci_ctrl *ctrl)
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{
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struct msm_ehci_priv *p = ctrl->priv;
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generic_phy_reset(&p->phy);
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}
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#endif
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static const struct udevice_id ehci_usb_ids[] = {
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{ .compatible = "qcom,ehci-host", },
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{ }
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};
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U_BOOT_DRIVER(usb_ehci) = {
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.name = "ehci_msm",
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.id = UCLASS_USB,
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.of_match = ehci_usb_ids,
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.ofdata_to_platdata = ehci_usb_ofdata_to_platdata,
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.probe = ehci_usb_probe,
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.remove = ehci_usb_remove,
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.ops = &ehci_usb_ops,
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.priv_auto_alloc_size = sizeof(struct msm_ehci_priv),
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.platdata_auto_alloc_size = sizeof(struct usb_platdata),
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.flags = DM_FLAG_ALLOC_PRIV_DMA,
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};
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