upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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28 lines
802 B
28 lines
802 B
/*
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* Copyright (c) 2013 Xilinx Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _SYS_PROTO_H_
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#define _SYS_PROTO_H_
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extern void zynq_slcr_lock(void);
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extern void zynq_slcr_unlock(void);
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extern void zynq_slcr_cpu_reset(void);
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extern void zynq_slcr_gem_clk_setup(u32 gem_id, unsigned long clk_rate);
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extern void zynq_slcr_devcfg_disable(void);
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extern void zynq_slcr_devcfg_enable(void);
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extern u32 zynq_slcr_get_boot_mode(void);
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extern u32 zynq_slcr_get_idcode(void);
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extern int zynq_slcr_get_mio_pin_status(const char *periph);
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extern void zynq_ddrc_init(void);
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extern unsigned int zynq_get_silicon_version(void);
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/* Driver extern functions */
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extern int zynq_sdhci_init(u32 regbase);
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extern int zynq_sdhci_of_init(const void *blob);
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extern void ps7_init(void);
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#endif /* _SYS_PROTO_H_ */
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