upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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165 lines
3.7 KiB
165 lines
3.7 KiB
/*
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* (C) Copyright 2000-2002
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <74xx_7xx.h>
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#include <asm/processor.h>
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DECLARE_GLOBAL_DATA_PTR;
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extern unsigned long get_board_bus_clk (void);
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static const int hid1_multipliers_x_10[] = {
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25, /* 0000 - 2.5x */
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75, /* 0001 - 7.5x */
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70, /* 0010 - 7x */
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10, /* 0011 - bypass */
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20, /* 0100 - 2x */
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65, /* 0101 - 6.5x */
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100, /* 0110 - 10x */
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45, /* 0111 - 4.5x */
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30, /* 1000 - 3x */
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55, /* 1001 - 5.5x */
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40, /* 1010 - 4x */
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50, /* 1011 - 5x */
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80, /* 1100 - 8x */
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60, /* 1101 - 6x */
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35, /* 1110 - 3.5x */
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0 /* 1111 - off */
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};
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/* PLL_CFG[0:4] table for cpu 7448/7447A/7455/7457 */
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static const int hid1_74xx_multipliers_x_10[] = {
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115, /* 00000 - 11.5x */
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170, /* 00001 - 17x */
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75, /* 00010 - 7.5x */
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150, /* 00011 - 15x */
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70, /* 00100 - 7x */
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180, /* 00101 - 18x */
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10, /* 00110 - bypass */
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200, /* 00111 - 20x */
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20, /* 01000 - 2x */
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210, /* 01001 - 21x */
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65, /* 01010 - 6.5x */
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130, /* 01011 - 13x */
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85, /* 01100 - 8.5x */
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240, /* 01101 - 24x */
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95, /* 01110 - 9.5x */
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90, /* 01111 - 9x */
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30, /* 10000 - 3x */
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105, /* 10001 - 10.5x */
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55, /* 10010 - 5.5x */
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110, /* 10011 - 11x */
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40, /* 10100 - 4x */
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100, /* 10101 - 10x */
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50, /* 10110 - 5x */
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120, /* 10111 - 12x */
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80, /* 11000 - 8x */
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140, /* 11001 - 14x */
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60, /* 11010 - 6x */
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160, /* 11011 - 16x */
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135, /* 11100 - 13.5x */
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280, /* 11101 - 28x */
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0, /* 11110 - off */
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125 /* 11111 - 12.5x */
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};
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static const int hid1_fx_multipliers_x_10[] = {
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00, /* 0000 - off */
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00, /* 0001 - off */
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10, /* 0010 - bypass */
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10, /* 0011 - bypass */
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20, /* 0100 - 2x */
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25, /* 0101 - 2.5x */
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30, /* 0110 - 3x */
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35, /* 0111 - 3.5x */
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40, /* 1000 - 4x */
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45, /* 1001 - 4.5x */
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50, /* 1010 - 5x */
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55, /* 1011 - 5.5x */
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60, /* 1100 - 6x */
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65, /* 1101 - 6.5x */
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70, /* 1110 - 7x */
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75, /* 1111 - 7.5 */
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80, /* 10000 - 8x */
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85, /* 10001 - 8.5x */
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90, /* 10010 - 9x */
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95, /* 10011 - 9.5x */
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100, /* 10100 - 10x */
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110, /* 10101 - 11x */
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120, /* 10110 - 12x */
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};
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/* ------------------------------------------------------------------------- */
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/*
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* Measure CPU clock speed (core clock GCLK1, GCLK2)
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*
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* (Approx. GCLK frequency in Hz)
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*/
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int get_clocks (void)
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{
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ulong clock = 0;
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#ifdef CONFIG_SYS_BUS_CLK
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gd->bus_clk = CONFIG_SYS_BUS_CLK; /* bus clock is a fixed frequency */
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#else
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gd->bus_clk = get_board_bus_clk (); /* bus clock is configurable */
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#endif
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/* calculate the clock frequency based upon the CPU type */
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switch (get_cpu_type()) {
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case CPU_7447A:
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case CPU_7448:
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case CPU_7455:
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case CPU_7457:
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/*
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* Make sure division is done before multiplication to prevent 32-bit
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* arithmetic overflows which will cause a negative number
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*/
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clock = (gd->bus_clk / 10) *
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hid1_74xx_multipliers_x_10[(get_hid1 () >> 12) & 0x1F];
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break;
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case CPU_750GX:
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case CPU_750FX:
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clock = (gd->bus_clk / 10) *
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hid1_fx_multipliers_x_10[get_hid1 () >> 27];
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break;
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case CPU_7450:
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case CPU_740:
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case CPU_740P:
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case CPU_745:
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case CPU_750CX:
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case CPU_750:
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case CPU_750P:
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case CPU_755:
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case CPU_7400:
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case CPU_7410:
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/*
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* Make sure division is done before multiplication to prevent 32-bit
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* arithmetic overflows which will cause a negative number
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*/
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clock = (gd->bus_clk / 10) *
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hid1_multipliers_x_10[get_hid1 () >> 28];
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break;
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case CPU_UNKNOWN:
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printf ("get_gclk_freq(): unknown CPU type\n");
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clock = 0;
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return (1);
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}
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gd->cpu_clk = clock;
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return (0);
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}
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/* ------------------------------------------------------------------------- */
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