upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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189 lines
5.0 KiB
189 lines
5.0 KiB
/*
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* (C) Copyright 2008
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* Based on modifications by Alan Lu / Artila
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* Author : Timo Tuunainen / Sysart
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Kimmo Leppala / Sysart
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <at91rm9200_net.h>
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#include <dm9161.h>
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#include "m501sk.h"
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#include "net.h"
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#ifdef CONFIG_M501SK
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void m501sk_gpio_init(void)
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{
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AT91C_BASE_PIOD->PIO_PER = 1 << (M501SK_DEBUG_LED1 - 96) |
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1 << (M501SK_DEBUG_LED2 - 96) | 1 << (M501SK_DEBUG_LED3 - 96) |
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1 << (M501SK_DEBUG_LED4 - 96) | 1 << (M501SK_READY_LED - 96);
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AT91C_BASE_PIOD->PIO_OER = 1 << (M501SK_DEBUG_LED1 - 96) |
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1 << (M501SK_DEBUG_LED2 - 96) | 1 << (M501SK_DEBUG_LED3 - 96) |
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1 << (M501SK_DEBUG_LED4 - 96) | 1 << (M501SK_READY_LED - 96);
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AT91C_BASE_PIOD->PIO_SODR = 1 << (M501SK_READY_LED - 96);
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AT91C_BASE_PIOD->PIO_CODR = 1 << (M501SK_DEBUG_LED3 - 96);
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AT91C_BASE_PIOB->PIO_PER = 1 << (M501SK_BUZZER - 32);
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AT91C_BASE_PIOB->PIO_OER = 1 << (M501SK_BUZZER - 32);
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AT91C_BASE_PIOC->PIO_PDR = (1 << 7) | (1 << 8);
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/* Power OFF all USART's LEDs */
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AT91C_BASE_PIOA->PIO_PER = AT91C_PA5_TXD3 | AT91C_PA6_RXD3 |
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AT91C_PA17_TXD0 | AT91C_PA18_RXD0 | AT91C_PA22_RXD2 | \
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AT91C_PA23_TXD2;
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AT91C_BASE_PIOA->PIO_OER = AT91C_PA5_TXD3 | AT91C_PA6_RXD3 |
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AT91C_PA17_TXD0 | AT91C_PA18_RXD0 | AT91C_PA22_RXD2 | \
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AT91C_PA23_TXD2;
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AT91C_BASE_PIOA->PIO_SODR = AT91C_PA5_TXD3 | AT91C_PA6_RXD3 |
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AT91C_PA17_TXD0 | AT91C_PA18_RXD0 | AT91C_PA22_RXD2 | \
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AT91C_PA23_TXD2;
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AT91C_BASE_PIOB->PIO_PER = AT91C_PB20_RXD1 | AT91C_PB21_TXD1;
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AT91C_BASE_PIOB->PIO_OER = AT91C_PB20_RXD1 | AT91C_PB21_TXD1;
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AT91C_BASE_PIOB->PIO_SODR = AT91C_PB20_RXD1 | AT91C_PB21_TXD1;
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}
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uchar m501sk_gpio_set(M501SK_PIO io)
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{
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uchar status = 0xff;
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switch (io) {
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case M501SK_DEBUG_LED1:
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case M501SK_DEBUG_LED2:
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case M501SK_DEBUG_LED3:
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case M501SK_DEBUG_LED4:
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case M501SK_READY_LED:
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AT91C_BASE_PIOD->PIO_SODR = 1 << (io - 96);
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status = AT91C_BASE_PIOD->PIO_ODSR & (1 << (io - 96));
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break;
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case M501SK_BUZZER:
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AT91C_BASE_PIOB->PIO_SODR = 1 << (io - 32);
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status = AT91C_BASE_PIOB->PIO_ODSR & (1 << (io - 32));
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break;
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}
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return status;
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}
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uchar m501sk_gpio_clear(M501SK_PIO io)
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{
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uchar status = 0xff;
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switch (io) {
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case M501SK_DEBUG_LED1:
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case M501SK_DEBUG_LED2:
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case M501SK_DEBUG_LED3:
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case M501SK_DEBUG_LED4:
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case M501SK_READY_LED:
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AT91C_BASE_PIOD->PIO_CODR = 1 << (io - 96);
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status = AT91C_BASE_PIOD->PIO_ODSR & (1 << (io - 96));
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break;
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case M501SK_BUZZER:
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AT91C_BASE_PIOB->PIO_CODR = 1 << (io - 32);
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status = AT91C_BASE_PIOB->PIO_ODSR & (1 << (io - 32));
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break;
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}
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return status;
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}
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/*
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* Miscelaneous platform dependent initialisations
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*/
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DECLARE_GLOBAL_DATA_PTR;
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int board_init(void)
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{
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/* Enable Ctrlc */
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console_init_f();
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/* Correct IRDA resistor problem */
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/* Set PA23_TXD in Output */
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((AT91PS_PIO)AT91C_BASE_PIOA)->PIO_OER = AT91C_PA23_TXD2;
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/* memory and cpu-speed are setup before relocation */
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/* so we do _nothing_ here */
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gd->bd->bi_arch_number = MACH_TYPE_M501;
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/* adress of boot parameters */
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
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m501sk_gpio_init();
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/* Do interrupt init here, because flash needs timers */
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interrupt_init();
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flash_init();
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return 0;
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}
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int dram_init(void)
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{
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int i = 0;
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gd->bd->bi_dram[0].start = PHYS_SDRAM;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
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for (i = 0; i < 500; i++) {
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m501sk_gpio_clear(M501SK_DEBUG_LED3);
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m501sk_gpio_clear(M501SK_BUZZER);
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udelay(250);
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m501sk_gpio_set(M501SK_DEBUG_LED3);
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m501sk_gpio_set(M501SK_BUZZER);
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udelay(80);
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}
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m501sk_gpio_clear(M501SK_BUZZER);
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m501sk_gpio_clear(M501SK_DEBUG_LED3);
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return 0;
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}
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int board_late_init(void)
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{
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#if defined(CONFIG_CMD_NET)
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eth_init(gd->bd);
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eth_halt();
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#endif
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/* Protect U-Boot, kernel & ramdisk memory addresses */
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run_command("protect on 10000000 1041ffff", 0);
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return 0;
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}
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#ifdef CONFIG_DRIVER_ETHER
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#if defined(CONFIG_CMD_NET)
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/*
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* Name:
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* at91rm9200_GetPhyInterface
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* Description:
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* Initialise the interface functions to the PHY
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* Arguments:
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* None
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* Return value:
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* None
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*/
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void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops)
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{
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p_phyops->Init = dm9161_InitPhy;
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p_phyops->IsPhyConnected = dm9161_IsPhyConnected;
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p_phyops->GetLinkSpeed = dm9161_GetLinkSpeed;
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p_phyops->AutoNegotiate = dm9161_AutoNegotiate;
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}
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#endif /* CONFIG_CMD_NET */
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#endif /* CONFIG_DRIVER_ETHER */
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#endif /* CONFIG_M501SK */
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