upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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270 lines
7.6 KiB
270 lines
7.6 KiB
/**
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* @file IxEthMii.h
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*
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* @brief this file contains the public API of @ref IxEthMii component
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*
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* Design notes :
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* The main intent of this API is to inplement MII high level fonctionalitoes
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* to support the codelets provided with the IXP400 software releases. It
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* superceedes previous interfaces provided with @ref IxEThAcc component.
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*
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* This API has been tested with the PHYs provided with the
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* IXP400 development platforms. It may not work for specific Ethernet PHYs
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* used on specific boards.
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*
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* This source code detects and interface the LXT972, LXT973 and KS6995
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* Ethernet PHYs.
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*
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* This source code should be considered as an example which may need
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* to be adapted for different hardware implementations.
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*
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* It is strongly recommended to use public domain and GPL utilities
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* like libmii, mii-diag for MII interface support.
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*
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*
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*
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* @par
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* IXP400 SW Release version 2.0
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*
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* -- Copyright Notice --
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*
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* @par
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* Copyright 2001-2005, Intel Corporation.
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* All rights reserved.
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*
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* @par
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Intel Corporation nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* @par
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @par
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* -- End of Copyright Notice --
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*/
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#ifndef IxEthMii_H
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#define IxEthMii_H
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#include <IxTypes.h>
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/**
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* @defgroup IxEthMii IXP400 Ethernet Phy Access (IxEthMii) API
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*
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* @brief ethMii is a library that does provides access to the
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* Ethernet PHYs
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*
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*@{
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*/
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/**
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* @ingroup IxEthMii
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*
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* @fn ixEthMiiPhyScan(BOOL phyPresent[], UINT32 maxPhyCount)
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*
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* @brief Scan the MDIO bus for PHYs
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* This function scans PHY addresses 0 through 31, and sets phyPresent[n] to
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* TRUE if a phy is discovered at address n.
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*
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* - Reentrant - no
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* - ISR Callable - no
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*
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* @pre The MAC on Ethernet Port 2 (NPE C) must be initialised, and generating the MDIO clock.
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*
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* @param phyPresent BOOL [in] - boolean array of IXP425_ETH_ACC_MII_MAX_ADDR entries
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* @param maxPhyCount UINT32 [in] - number of PHYs to search for (the scan will stop when
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* the indicated number of PHYs is found).
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*
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* @return IX_STATUS
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* - IX_ETH_ACC_SUCCESS
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* - IX_ETH_ACC_FAIL : invalid arguments.
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*
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* <hr>
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*/
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PUBLIC IX_STATUS ixEthMiiPhyScan(BOOL phyPresent[], UINT32 maxPhyCount);
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/**
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* @ingroup IxEthMii
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*
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* @fn ixEthMiiPhyConfig(UINT32 phyAddr,
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BOOL speed100,
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BOOL fullDuplex,
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BOOL autonegotiate)
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*
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*
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* @brief Configure a PHY
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* Configure a PHY's speed, duplex and autonegotiation status
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*
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* - Reentrant - no
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* - ISR Callable - no
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*
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* @pre The MAC on Ethernet Port 2 (NPE C) must be initialised, and generating the MDIO clock.
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*
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* @param phyAddr UINT32 [in]
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* @param speed100 BOOL [in] - set to TRUE for 100Mbit/s operation, FALSE for 10Mbit/s
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* @param fullDuplex BOOL [in] - set to TRUE for Full Duplex, FALSE for Half Duplex
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* @param autonegotiate BOOL [in] - set to TRUE to enable autonegotiation
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*
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* @return IX_STATUS
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* - IX_SUCCESS
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* - IX_FAIL : invalid arguments.
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*
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* <hr>
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*/
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PUBLIC IX_STATUS ixEthMiiPhyConfig(UINT32 phyAddr,
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BOOL speed100,
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BOOL fullDuplex,
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BOOL autonegotiate);
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/**
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* @ingroup IxEthMii
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*
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* @fn ixEthMiiPhyLoopbackEnable(UINT32 phyAddr)
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*
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*
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* @brief Enable PHY Loopback in a specific Eth MII port
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*
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* @note When PHY Loopback is enabled, frames sent out to the PHY from the
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* IXP400 will be looped back to the IXP400. They will not be transmitted out
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* on the wire.
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*
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* - Reentrant - no
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* - ISR Callable - no
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*
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* @param phyAddr UINT32 [in] - the address of the Ethernet PHY (0-31)
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*
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* @return IX_STATUS
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* - IX_SUCCESS
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* - IX_FAIL : invalid arguments.
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* <hr>
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*/
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PUBLIC IX_STATUS
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ixEthMiiPhyLoopbackEnable (UINT32 phyAddr);
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/**
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* @ingroup IxEthMii
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*
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* @fn ixEthMiiPhyLoopbackDisable(UINT32 phyAddr)
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*
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*
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* @brief Disable PHY Loopback in a specific Eth MII port
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*
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* - Reentrant - no
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* - ISR Callable - no
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*
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* @param phyAddr UINT32 [in] - the address of the Ethernet PHY (0-31)
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*
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* @return IX_STATUS
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* - IX_SUCCESS
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* - IX_FAIL : invalid arguments.
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* <hr>
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*/
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PUBLIC IX_STATUS
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ixEthMiiPhyLoopbackDisable (UINT32 phyAddr);
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/**
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* @ingroup IxEthMii
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*
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* @fn ixEthMiiPhyReset(UINT32 phyAddr)
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*
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* @brief Reset a PHY
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* Reset a PHY
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*
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* - Reentrant - no
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* - ISR Callable - no
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*
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* @pre The MAC on Ethernet Port 2 (NPE C) must be initialised, and generating the MDIO clock.
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*
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* @param phyAddr UINT32 [in] - the address of the Ethernet PHY (0-31)
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*
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* @return IX_STATUS
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* - IX_SUCCESS
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* - IX_FAIL : invalid arguments.
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*
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* <hr>
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*/
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PUBLIC IX_STATUS ixEthMiiPhyReset(UINT32 phyAddr);
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/**
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* @ingroup IxEthMii
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*
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* @fn ixEthMiiLinkStatus(UINT32 phyAddr,
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BOOL *linkUp,
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BOOL *speed100,
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BOOL *fullDuplex,
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BOOL *autoneg)
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*
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* @brief Retrieve the current status of a PHY
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* Retrieve the link, speed, duplex and autonegotiation status of a PHY
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*
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* - Reentrant - no
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* - ISR Callable - no
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*
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* @pre The MAC on Ethernet Port 2 (NPE C) must be initialised, and generating the MDIO clock.
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*
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* @param phyAddr UINT32 [in] - the address of the Ethernet PHY (0-31)
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* @param linkUp BOOL [out] - set to TRUE if the link is up
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* @param speed100 BOOL [out] - set to TRUE indicates 100Mbit/s, FALSE indicates 10Mbit/s
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* @param fullDuplex BOOL [out] - set to TRUE indicates Full Duplex, FALSE indicates Half Duplex
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* @param autoneg BOOL [out] - set to TRUE indicates autonegotiation is enabled, FALSE indicates autonegotiation is disabled
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*
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* @return IX_STATUS
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* - IX_SUCCESS
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* - IX_FAIL : invalid arguments.
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*
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* <hr>
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*/
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PUBLIC IX_STATUS ixEthMiiLinkStatus(UINT32 phyAddr,
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BOOL *linkUp,
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BOOL *speed100,
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BOOL *fullDuplex,
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BOOL *autoneg);
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/**
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* @ingroup IxEthMii
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*
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* @fn ixEthMiiPhyShow (UINT32 phyAddr)
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*
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*
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* @brief Display information on a specified PHY
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* Display link status, speed, duplex and Auto Negotiation status
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*
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* - Reentrant - no
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* - ISR Callable - no
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*
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* @pre The MAC on Ethernet Port 2 (NPE C) must be initialised, and generating the MDIO clock.
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*
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* @param phyAddr UINT32 [in] - the address of the Ethernet PHY (0-31)
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*
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* @return IX_STATUS
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* - IX_SUCCESS
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* - IX_FAIL : invalid arguments.
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*
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* <hr>
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*/
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PUBLIC IX_STATUS ixEthMiiPhyShow (UINT32 phyAddr);
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#endif /* ndef IxEthMii_H */
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/**
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*@}
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*/
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