upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support
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u-boot/drivers/ns16550.c

62 lines
1.4 KiB

/*
* COM1 NS16550 support
* originally from linux source (arch/ppc/boot/ns16550.c)
* modified to use CFG_ISA_MEM and new defines
*/
#include <config.h>
#ifdef CFG_NS16550
#include <ns16550.h>
#define LCRVAL LCR_8N1 /* 8 data, 1 stop, no parity */
#define MCRVAL (MCR_DTR | MCR_RTS) /* RTS/DTR */
#define FCRVAL (FCR_FIFO_EN | FCR_RXSR | FCR_TXSR) /* Clear & enable FIFOs */
void NS16550_init (NS16550_t com_port, int baud_divisor)
{
com_port->ier = 0x00;
#ifdef CONFIG_OMAP1510
com_port->mdr1 = 0x7; /* mode select reset TL16C750*/
#endif
com_port->lcr = LCR_BKSE | LCRVAL;
com_port->dll = baud_divisor & 0xff;
com_port->dlm = (baud_divisor >> 8) & 0xff;
com_port->lcr = LCRVAL;
com_port->mcr = MCRVAL;
com_port->fcr = FCRVAL;
#if defined(CONFIG_OMAP1510) || defined(CONFIG_OMAP1610)
com_port->mdr1 = 0; /* select uart mode */
#endif
}
void NS16550_reinit (NS16550_t com_port, int baud_divisor)
{
com_port->ier = 0x00;
com_port->lcr = LCR_BKSE;
com_port->dll = baud_divisor & 0xff;
com_port->dlm = (baud_divisor >> 8) & 0xff;
com_port->lcr = LCRVAL;
com_port->mcr = MCRVAL;
com_port->fcr = FCRVAL;
}
void NS16550_putc (NS16550_t com_port, char c)
{
while ((com_port->lsr & LSR_THRE) == 0);
com_port->thr = c;
}
char NS16550_getc (NS16550_t com_port)
{
while ((com_port->lsr & LSR_DR) == 0);
return (com_port->rbr);
}
int NS16550_tstc (NS16550_t com_port)
{
return ((com_port->lsr & LSR_DR) != 0);
}
#endif