upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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77 lines
1.5 KiB
77 lines
1.5 KiB
/*
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* Copyright (C) 2014 Panasonic Corporation
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* Copyright (C) 2015 Socionext Inc.
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* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <linux/err.h>
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#include <asm/io.h>
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#include <usb.h>
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#include <mach/mio-regs.h>
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#include <fdtdec.h>
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#include "ehci.h"
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DECLARE_GLOBAL_DATA_PTR;
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#define FDT gd->fdt_blob
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#define COMPAT "socionext,uniphier-ehci"
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static int get_uniphier_ehci_base(int index, struct ehci_hccr **base)
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{
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int offset;
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for (offset = fdt_node_offset_by_compatible(FDT, 0, COMPAT);
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offset >= 0;
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offset = fdt_node_offset_by_compatible(FDT, offset, COMPAT)) {
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if (index == 0) {
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*base = (struct ehci_hccr *)
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fdtdec_get_addr(FDT, offset, "reg");
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return 0;
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}
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index--;
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}
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return -ENODEV; /* not found */
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}
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static void uniphier_ehci_reset(int index, int on)
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{
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u32 tmp;
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tmp = readl(MIO_USB_RSTCTRL(index));
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if (on)
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tmp &= ~MIO_USB_RSTCTRL_XRST;
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else
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tmp |= MIO_USB_RSTCTRL_XRST;
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writel(tmp, MIO_USB_RSTCTRL(index));
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}
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int ehci_hcd_init(int index, enum usb_init_type init, struct ehci_hccr **hccr,
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struct ehci_hcor **hcor)
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{
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int ret;
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struct ehci_hccr *cr;
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struct ehci_hcor *or;
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uniphier_ehci_reset(index, 0);
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ret = get_uniphier_ehci_base(index, &cr);
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if (ret < 0)
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return ret;
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or = (void *)cr + HC_LENGTH(ehci_readl(&cr->cr_capbase));
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*hccr = cr;
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*hcor = or;
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return 0;
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}
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int ehci_hcd_stop(int index)
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{
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uniphier_ehci_reset(index, 1);
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return 0;
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}
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