upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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114 lines
3.6 KiB
114 lines
3.6 KiB
menu "NAND Device Support"
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config SYS_NAND_SELF_INIT
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bool
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help
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This option, if enabled, provides more flexible and linux-like
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NAND initialization process.
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config NAND_DENALI
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bool "Support Denali NAND controller"
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select SYS_NAND_SELF_INIT
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help
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Enable support for the Denali NAND controller.
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config SYS_NAND_DENALI_64BIT
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bool "Use 64-bit variant of Denali NAND controller"
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depends on NAND_DENALI
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help
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The Denali NAND controller IP has some variations in terms of
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the bus interface. The DMA setup sequence is completely differenct
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between 32bit / 64bit AXI bus variants.
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If your Denali NAND controller is the 64-bit variant, say Y.
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Otherwise (32 bit), say N.
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config NAND_DENALI_SPARE_AREA_SKIP_BYTES
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int "Number of bytes skipped in OOB area"
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depends on NAND_DENALI
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range 0 63
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help
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This option specifies the number of bytes to skip from the beginning
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of OOB area before last ECC sector data starts. This is potentially
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used to preserve the bad block marker in the OOB area.
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config NAND_VF610_NFC
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bool "Support for Freescale NFC for VF610/MPC5125"
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select SYS_NAND_SELF_INIT
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help
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Enables support for NAND Flash Controller on some Freescale
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processors like the VF610, MPC5125, MCF54418 or Kinetis K70.
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The driver supports a maximum 2k page size. The driver
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currently does not support hardware ECC.
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choice
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prompt "Hardware ECC strength"
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depends on NAND_VF610_NFC
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default SYS_NAND_VF610_NFC_45_ECC_BYTES
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help
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Select the ECC strength used in the hardware BCH ECC block.
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config SYS_NAND_VF610_NFC_45_ECC_BYTES
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bool "24-error correction (45 ECC bytes)"
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config SYS_NAND_VF610_NFC_60_ECC_BYTES
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bool "32-error correction (60 ECC bytes)"
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endchoice
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config NAND_PXA3XX
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bool "Support for NAND on PXA3xx and Armada 370/XP/38x"
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select SYS_NAND_SELF_INIT
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help
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This enables the driver for the NAND flash device found on
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PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2).
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config NAND_SUNXI
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bool "Support for NAND on Allwinner SoCs in SPL"
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depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
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select SYS_NAND_SELF_INIT
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---help---
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Enable support for NAND. This option allows SPL to read from
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sunxi NAND using DMA transfers.
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comment "Generic NAND options"
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# Enhance depends when converting drivers to Kconfig which use this config
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# option (mxc_nand, ndfc, omap_gpmc).
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config SYS_NAND_BUSWIDTH_16BIT
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bool "Use 16-bit NAND interface"
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depends on NAND_VF610_NFC
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help
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Indicates that NAND device has 16-bit wide data-bus. In absence of this
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config, bus-width of NAND device is assumed to be either 8-bit and later
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determined by reading ONFI params.
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Above config is useful when NAND device's bus-width information cannot
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be determined from on-chip ONFI params, like in following scenarios:
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- SPL boot does not support reading of ONFI parameters. This is done to
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keep SPL code foot-print small.
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- In current U-Boot flow using nand_init(), driver initialization
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happens in board_nand_init() which is called before any device probe
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(nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are
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not available while configuring controller. So a static CONFIG_NAND_xx
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is needed to know the device's bus-width in advance.
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# Enhance depends when converting drivers to Kconfig which use this config
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config SYS_NAND_U_BOOT_OFFS
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hex "Location in NAND to read U-Boot from"
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default 0x8000 if NAND_SUNXI
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depends on NAND_SUNXI
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help
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Set the offset from the start of the nand where u-boot should be
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loaded from.
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if SPL
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config SPL_NAND_DENALI
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bool "Support Denali NAND controller for SPL"
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help
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This is a small implementation of the Denali NAND controller
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for use on SPL.
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endif
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endmenu
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