upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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62 lines
1.6 KiB
62 lines
1.6 KiB
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2015 Google, Inc
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* Written by Simon Glass <sjg@chromium.org>
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*/
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#include <common.h>
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#include <dm.h>
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#include <syscon.h>
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#include <asm/arch/clock.h>
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static const struct udevice_id rk3288_syscon_ids[] = {
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{ .compatible = "rockchip,rk3288-noc", .data = ROCKCHIP_SYSCON_NOC },
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{ .compatible = "rockchip,rk3288-grf", .data = ROCKCHIP_SYSCON_GRF },
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{ .compatible = "rockchip,rk3288-sgrf", .data = ROCKCHIP_SYSCON_SGRF },
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{ .compatible = "rockchip,rk3288-pmu", .data = ROCKCHIP_SYSCON_PMU },
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{ }
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};
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U_BOOT_DRIVER(syscon_rk3288) = {
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.name = "rk3288_syscon",
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.id = UCLASS_SYSCON,
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.of_match = rk3288_syscon_ids,
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};
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#if CONFIG_IS_ENABLED(OF_PLATDATA)
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static int rk3288_syscon_bind_of_platdata(struct udevice *dev)
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{
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dev->driver_data = dev->driver->of_match->data;
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debug("syscon: %s %d\n", dev->name, (uint)dev->driver_data);
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return 0;
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}
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U_BOOT_DRIVER(rockchip_rk3288_noc) = {
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.name = "rockchip_rk3288_noc",
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.id = UCLASS_SYSCON,
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.of_match = rk3288_syscon_ids,
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.bind = rk3288_syscon_bind_of_platdata,
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};
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U_BOOT_DRIVER(rockchip_rk3288_grf) = {
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.name = "rockchip_rk3288_grf",
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.id = UCLASS_SYSCON,
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.of_match = rk3288_syscon_ids + 1,
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.bind = rk3288_syscon_bind_of_platdata,
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};
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U_BOOT_DRIVER(rockchip_rk3288_sgrf) = {
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.name = "rockchip_rk3288_sgrf",
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.id = UCLASS_SYSCON,
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.of_match = rk3288_syscon_ids + 2,
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.bind = rk3288_syscon_bind_of_platdata,
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};
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U_BOOT_DRIVER(rockchip_rk3288_pmu) = {
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.name = "rockchip_rk3288_pmu",
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.id = UCLASS_SYSCON,
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.of_match = rk3288_syscon_ids + 3,
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.bind = rk3288_syscon_bind_of_platdata,
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};
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#endif
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