upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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197 lines
5.1 KiB
197 lines
5.1 KiB
/*
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*(C) Copyright 2005-2008 Netstal Maschinen AG
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* Niklaus Giger (Niklaus.Giger@netstal.com)
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*
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* This source code is free software; you can redistribute it
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* and/or modify it in source code form under the terms of the GNU
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* General Public License as published by the Free Software
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* Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#include <common.h>
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#include <asm/ppc4xx.h>
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#include <asm/processor.h>
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#include <asm/io.h>
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#include <asm/u-boot.h>
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#include "../common/nm.h"
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DECLARE_GLOBAL_DATA_PTR;
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#define MCU25_SLOT_ADDRESS (0x7A000000 + 0x0A)
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#define MCU25_DIGITAL_IO_REGISTER (0x7A000000 + 0xc0)
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#define MCU25_LED_REGISTER_ADDRESS (0x7C000000 + 0x10)
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#define MCU25_VERSIONS_REGISTER (0x7C000000 + 0x0C)
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#define MCU25_IO_CONFIGURATION (0x7C000000 + 0x0e)
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#define MCU_SW_INSTALL_REQUESTED 0x08
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#define SDRAM_LEN (32 << 20) /* 32 MB - RAM */
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/*
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* This function is run very early, out of flash, and before devices are
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* initialized. It is called by arch/powerpc/lib/board.c:board_init_f by virtue
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* of being in the init_sequence array.
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*
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* The SDRAM has been initialized already -- start.S:start called
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* init.S:init_sdram early on -- but it is not yet being used for
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* anything, not even stack. So be careful.
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*/
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/* Attention: If you want 1 microsecs times from the external oscillator
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* 0x00004051 is okay for u-boot/linux, but different from old vxworks values
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* 0x00804051 causes problems with u-boot and linux!
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*/
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#define CPC0_CR0_VALUE 0x0007F03C
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#define CPC0_CR1_VALUE 0x00004051
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int board_early_init_f (void)
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{
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/* Documented in A-1171
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*
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* Interrupt controller setup for the MCU25 board.
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* Note: IRQ 0-15 405GP internally generated; high; level sensitive
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* IRQ 16 405GP internally generated; low; level sensitive
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* IRQ 17-24 RESERVED/UNUSED
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* IRQ 31 (EXT IRQ 6) (unused)
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*/
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mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
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mtdcr(UIC0ER, 0x00000000); /* disable all ints */
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mtdcr(UIC0CR, 0x00000000); /* set all to be non-critical */
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mtdcr(UIC0PR, 0xFFFFE000); /* set int polarities */
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mtdcr(UIC0TR, 0x00000000); /* set int trigger levels */
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mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
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mtdcr(CPC0_CR1, CPC0_CR1_VALUE);
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mtdcr(CPC0_ECR, 0x60606000);
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mtdcr(CPC0_EIRR, 0x7C000000);
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out32(GPIO0_OR, CONFIG_SYS_GPIO0_OR );
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out32(GPIO0_TCR, CONFIG_SYS_GPIO0_TCR);
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out32(GPIO0_ODR, CONFIG_SYS_GPIO0_ODR);
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mtspr(SPRN_CCR0, 0x00700000);
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return 0;
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}
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#ifdef CONFIG_BOARD_PRE_INIT
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int board_pre_init (void)
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{
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return board_early_init_f ();
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}
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#endif
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int sys_install_requested(void)
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{
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u16 ioValue = in_be16((u16 *)MCU25_DIGITAL_IO_REGISTER);
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return (ioValue & MCU_SW_INSTALL_REQUESTED) != 0;
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}
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int checkboard (void)
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{
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u16 boardVersReg = in_be16((u16 *)MCU25_VERSIONS_REGISTER);
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u16 hwConfig = in_be16((u16 *)MCU25_IO_CONFIGURATION);
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u16 generation = boardVersReg & 0x0f;
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u16 index = boardVersReg & 0xf0;
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/* Cannot be done in board_early_init */
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mtdcr(CPC0_CR0, CPC0_CR0_VALUE);
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/* Force /RTS to active. The board it not wired quite
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* correctly to use cts/rtc flow control, so just force the
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* /RST active and forget about it.
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*/
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writeb (readb (0xef600404) | 0x03, 0xef600404);
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nm_show_print(generation, index, hwConfig);
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return 0;
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}
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u32 hcu_led_get(void)
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{
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return in_be16((u16 *)MCU25_LED_REGISTER_ADDRESS) & 0x3ff;
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}
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/*
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* hcu_led_set value to be placed into the LEDs (max 6 bit)
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*/
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void hcu_led_set(u32 value)
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{
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out_be16((u16 *)MCU25_LED_REGISTER_ADDRESS, value);
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}
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/*
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* hcu_get_slot
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*/
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u32 hcu_get_slot(void)
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{
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u16 slot = in_be16((u16 *)MCU25_SLOT_ADDRESS);
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return slot & 0x7f;
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}
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/*
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* get_serial_number
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*/
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u32 get_serial_number(void)
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{
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u32 serial = in_be32((u32 *)CONFIG_SYS_FLASH_BASE);
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if (serial == 0xffffffff)
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return 0;
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return serial;
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}
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/*
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* misc_init_r.
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*/
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int misc_init_r(void)
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{
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common_misc_init_r();
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set_params_for_sw_install( sys_install_requested(), "mcu25" );
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return 0;
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}
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phys_size_t initdram(int board_type)
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{
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unsigned int dram_size = 64*1024*1024;
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init_ppc405_sdram(dram_size);
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#ifdef DEBUG
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show_sdram_registers();
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#endif
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return dram_size;
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}
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#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
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void ft_board_setup(void *blob, bd_t *bd)
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{
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ft_cpu_setup(blob, bd);
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}
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#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
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/*
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* Hardcoded flash setup:
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* Flash 0 is a non-CFI AMD AM29F040 flash, 8 bit flash / 8 bit bus.
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*/
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ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t * info)
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{
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if (banknum == 0) { /* non-CFI boot flash */
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info->portwidth = 1;
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info->chipwidth = 1;
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info->interface = FLASH_CFI_X8;
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return 1;
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} else
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return 0;
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}
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