upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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757 lines
19 KiB
757 lines
19 KiB
/*
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* ax88180: ASIX AX88180 Non-PCI Gigabit Ethernet u-boot driver
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*
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* This program is free software; you can distribute it and/or modify
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* it under the terms of the GNU General Public License (Version 2) as
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* published by the Free Software Foundation.
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* This program is distributed in the hope it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the GNU General Public License for more details.
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston MA 02111-1307,
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* USA.
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*/
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/*
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* ========================================================================
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* ASIX AX88180 Non-PCI 16/32-bit Gigabit Ethernet Linux Driver
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*
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* The AX88180 Ethernet controller is a high performance and highly
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* integrated local CPU bus Ethernet controller with embedded 40K bytes
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* SRAM and supports both 16-bit and 32-bit SRAM-Like interfaces for any
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* embedded systems.
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* The AX88180 is a single chip 10/100/1000Mbps Gigabit Ethernet
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* controller that supports both MII and RGMII interfaces and is
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* compliant to IEEE 802.3, IEEE 802.3u and IEEE 802.3z standards.
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*
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* Please visit ASIX's web site (http://www.asix.com.tw) for more
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* details.
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*
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* Module Name : ax88180.c
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* Date : 2008-07-07
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* History
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* 09/06/2006 : New release for AX88180 US2 chip.
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* 07/07/2008 : Fix up the coding style and using inline functions
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* instead of macros
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* ========================================================================
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*/
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#include <common.h>
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#include <command.h>
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#include <net.h>
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#include <malloc.h>
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#include <linux/mii.h>
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#include "ax88180.h"
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/*
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* ===========================================================================
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* Local SubProgram Declaration
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* ===========================================================================
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*/
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static void ax88180_rx_handler (struct eth_device *dev);
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static int ax88180_phy_initial (struct eth_device *dev);
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static void ax88180_media_config (struct eth_device *dev);
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static unsigned long get_CicadaPHY_media_mode (struct eth_device *dev);
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static unsigned long get_MarvellPHY_media_mode (struct eth_device *dev);
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static unsigned short ax88180_mdio_read (struct eth_device *dev,
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unsigned long regaddr);
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static void ax88180_mdio_write (struct eth_device *dev,
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unsigned long regaddr, unsigned short regdata);
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/*
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* ===========================================================================
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* Local SubProgram Bodies
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* ===========================================================================
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*/
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static int ax88180_mdio_check_complete (struct eth_device *dev)
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{
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int us_cnt = 10000;
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unsigned short tmpval;
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/* MDIO read/write should not take more than 10 ms */
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while (--us_cnt) {
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tmpval = INW (dev, MDIOCTRL);
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if (((tmpval & READ_PHY) == 0) && ((tmpval & WRITE_PHY) == 0))
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break;
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}
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return us_cnt;
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}
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static unsigned short
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ax88180_mdio_read (struct eth_device *dev, unsigned long regaddr)
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{
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struct ax88180_private *priv = (struct ax88180_private *)dev->priv;
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unsigned long tmpval = 0;
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OUTW (dev, (READ_PHY | (regaddr << 8) | priv->PhyAddr), MDIOCTRL);
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if (ax88180_mdio_check_complete (dev))
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tmpval = INW (dev, MDIODP);
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else
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printf ("Failed to read PHY register!\n");
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return (unsigned short)(tmpval & 0xFFFF);
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}
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static void
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ax88180_mdio_write (struct eth_device *dev, unsigned long regaddr,
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unsigned short regdata)
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{
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struct ax88180_private *priv = (struct ax88180_private *)dev->priv;
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OUTW (dev, regdata, MDIODP);
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OUTW (dev, (WRITE_PHY | (regaddr << 8) | priv->PhyAddr), MDIOCTRL);
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if (!ax88180_mdio_check_complete (dev))
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printf ("Failed to write PHY register!\n");
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}
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static int ax88180_phy_reset (struct eth_device *dev)
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{
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unsigned short delay_cnt = 500;
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ax88180_mdio_write (dev, MII_BMCR, (BMCR_RESET | BMCR_ANENABLE));
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/* Wait for the reset to complete, or time out (500 ms) */
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while (ax88180_mdio_read (dev, MII_BMCR) & BMCR_RESET) {
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udelay (1000);
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if (--delay_cnt == 0) {
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printf ("Failed to reset PHY!\n");
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return -1;
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}
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}
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return 0;
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}
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static void ax88180_mac_reset (struct eth_device *dev)
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{
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unsigned long tmpval;
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unsigned char i;
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struct {
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unsigned short offset, value;
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} program_seq[] = {
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{
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MISC, MISC_NORMAL}, {
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RXINDICATOR, DEFAULT_RXINDICATOR}, {
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TXCMD, DEFAULT_TXCMD}, {
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TXBS, DEFAULT_TXBS}, {
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TXDES0, DEFAULT_TXDES0}, {
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TXDES1, DEFAULT_TXDES1}, {
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TXDES2, DEFAULT_TXDES2}, {
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TXDES3, DEFAULT_TXDES3}, {
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TXCFG, DEFAULT_TXCFG}, {
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MACCFG2, DEFAULT_MACCFG2}, {
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MACCFG3, DEFAULT_MACCFG3}, {
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TXLEN, DEFAULT_TXLEN}, {
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RXBTHD0, DEFAULT_RXBTHD0}, {
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RXBTHD1, DEFAULT_RXBTHD1}, {
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RXFULTHD, DEFAULT_RXFULTHD}, {
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DOGTHD0, DEFAULT_DOGTHD0}, {
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DOGTHD1, DEFAULT_DOGTHD1},};
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OUTW (dev, MISC_RESET_MAC, MISC);
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tmpval = INW (dev, MISC);
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for (i = 0; i < ARRAY_SIZE(program_seq); i++)
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OUTW (dev, program_seq[i].value, program_seq[i].offset);
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}
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static int ax88180_poll_tx_complete (struct eth_device *dev)
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{
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struct ax88180_private *priv = (struct ax88180_private *)dev->priv;
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unsigned long tmpval, txbs_txdp;
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int TimeOutCnt = 10000;
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txbs_txdp = 1 << priv->NextTxDesc;
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while (TimeOutCnt--) {
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tmpval = INW (dev, TXBS);
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if ((tmpval & txbs_txdp) == 0)
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break;
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udelay (100);
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}
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if (TimeOutCnt)
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return 0;
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else
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return -TimeOutCnt;
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}
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static void ax88180_rx_handler (struct eth_device *dev)
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{
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struct ax88180_private *priv = (struct ax88180_private *)dev->priv;
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unsigned long data_size;
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unsigned short rxcurt_ptr, rxbound_ptr, next_ptr;
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int i;
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#if defined (CONFIG_DRIVER_AX88180_16BIT)
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unsigned short *rxdata = (unsigned short *)net_rx_packets[0];
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#else
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unsigned long *rxdata = (unsigned long *)net_rx_packets[0];
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#endif
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unsigned short count;
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rxcurt_ptr = INW (dev, RXCURT);
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rxbound_ptr = INW (dev, RXBOUND);
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next_ptr = (rxbound_ptr + 1) & RX_PAGE_NUM_MASK;
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debug ("ax88180: RX original RXBOUND=0x%04x,"
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" RXCURT=0x%04x\n", rxbound_ptr, rxcurt_ptr);
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while (next_ptr != rxcurt_ptr) {
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OUTW (dev, RX_START_READ, RXINDICATOR);
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data_size = READ_RXBUF (dev) & 0xFFFF;
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if ((data_size == 0) || (data_size > MAX_RX_SIZE)) {
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OUTW (dev, RX_STOP_READ, RXINDICATOR);
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ax88180_mac_reset (dev);
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printf ("ax88180: Invalid Rx packet length!"
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" (len=0x%04lx)\n", data_size);
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debug ("ax88180: RX RXBOUND=0x%04x,"
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"RXCURT=0x%04x\n", rxbound_ptr, rxcurt_ptr);
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return;
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}
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rxbound_ptr += (((data_size + 0xF) & 0xFFF0) >> 4) + 1;
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rxbound_ptr &= RX_PAGE_NUM_MASK;
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/* Comput access times */
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count = (data_size + priv->PadSize) >> priv->BusWidth;
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for (i = 0; i < count; i++) {
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*(rxdata + i) = READ_RXBUF (dev);
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}
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OUTW (dev, RX_STOP_READ, RXINDICATOR);
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/* Pass the packet up to the protocol layers. */
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net_process_received_packet(net_rx_packets[0], data_size);
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OUTW (dev, rxbound_ptr, RXBOUND);
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rxcurt_ptr = INW (dev, RXCURT);
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rxbound_ptr = INW (dev, RXBOUND);
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next_ptr = (rxbound_ptr + 1) & RX_PAGE_NUM_MASK;
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debug ("ax88180: RX updated RXBOUND=0x%04x,"
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"RXCURT=0x%04x\n", rxbound_ptr, rxcurt_ptr);
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}
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return;
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}
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static int ax88180_phy_initial (struct eth_device *dev)
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{
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struct ax88180_private *priv = (struct ax88180_private *)dev->priv;
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unsigned long tmp_regval;
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unsigned short phyaddr;
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/* Search for first avaliable PHY chipset */
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#ifdef CONFIG_PHY_ADDR
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phyaddr = CONFIG_PHY_ADDR;
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#else
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for (phyaddr = 0; phyaddr < 32; ++phyaddr)
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#endif
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{
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priv->PhyAddr = phyaddr;
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priv->PhyID0 = ax88180_mdio_read(dev, MII_PHYSID1);
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priv->PhyID1 = ax88180_mdio_read(dev, MII_PHYSID2);
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switch (priv->PhyID0) {
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case MARVELL_ALASKA_PHYSID0:
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debug("ax88180: Found Marvell Alaska PHY family."
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" (PHY Addr=0x%x)\n", priv->PhyAddr);
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switch (priv->PhyID1) {
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case MARVELL_88E1118_PHYSID1:
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ax88180_mdio_write(dev, M88E1118_PAGE_SEL, 2);
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ax88180_mdio_write(dev, M88E1118_CR,
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M88E1118_CR_DEFAULT);
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ax88180_mdio_write(dev, M88E1118_PAGE_SEL, 3);
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ax88180_mdio_write(dev, M88E1118_LEDCTL,
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M88E1118_LEDCTL_DEFAULT);
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ax88180_mdio_write(dev, M88E1118_LEDMIX,
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M88E1118_LEDMIX_LED050 | M88E1118_LEDMIX_LED150 | 0x15);
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ax88180_mdio_write(dev, M88E1118_PAGE_SEL, 0);
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default: /* Default to 88E1111 Phy */
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tmp_regval = ax88180_mdio_read(dev, M88E1111_EXT_SSR);
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if ((tmp_regval & HWCFG_MODE_MASK) != RGMII_COPPER_MODE)
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ax88180_mdio_write(dev, M88E1111_EXT_SCR,
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DEFAULT_EXT_SCR);
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}
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if (ax88180_phy_reset(dev) < 0)
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return 0;
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ax88180_mdio_write(dev, M88_IER, LINK_CHANGE_INT);
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return 1;
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case CICADA_CIS8201_PHYSID0:
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debug("ax88180: Found CICADA CIS8201 PHY"
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" chipset. (PHY Addr=0x%x)\n", priv->PhyAddr);
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ax88180_mdio_write(dev, CIS_IMR,
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(CIS_INT_ENABLE | LINK_CHANGE_INT));
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/* Set CIS_SMI_PRIORITY bit before force the media mode */
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tmp_regval = ax88180_mdio_read(dev, CIS_AUX_CTRL_STATUS);
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tmp_regval &= ~CIS_SMI_PRIORITY;
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ax88180_mdio_write(dev, CIS_AUX_CTRL_STATUS, tmp_regval);
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return 1;
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case 0xffff:
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/* No PHY at this addr */
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break;
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default:
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printf("ax88180: Unknown PHY chipset %#x at addr %#x\n",
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priv->PhyID0, priv->PhyAddr);
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break;
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}
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}
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printf("ax88180: Unknown PHY chipset!!\n");
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return 0;
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}
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static void ax88180_media_config (struct eth_device *dev)
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{
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struct ax88180_private *priv = (struct ax88180_private *)dev->priv;
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unsigned long bmcr_val, bmsr_val;
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unsigned long rxcfg_val, maccfg0_val, maccfg1_val;
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unsigned long RealMediaMode;
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int i;
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/* Waiting 2 seconds for PHY link stable */
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for (i = 0; i < 20000; i++) {
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bmsr_val = ax88180_mdio_read (dev, MII_BMSR);
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if (bmsr_val & BMSR_LSTATUS) {
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break;
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}
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udelay (100);
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}
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bmsr_val = ax88180_mdio_read (dev, MII_BMSR);
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debug ("ax88180: BMSR=0x%04x\n", (unsigned int)bmsr_val);
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if (bmsr_val & BMSR_LSTATUS) {
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bmcr_val = ax88180_mdio_read (dev, MII_BMCR);
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if (bmcr_val & BMCR_ANENABLE) {
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/*
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* Waiting for Auto-negotiation completion, this may
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* take up to 5 seconds.
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*/
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debug ("ax88180: Auto-negotiation is "
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"enabled. Waiting for NWay completion..\n");
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for (i = 0; i < 50000; i++) {
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bmsr_val = ax88180_mdio_read (dev, MII_BMSR);
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if (bmsr_val & BMSR_ANEGCOMPLETE) {
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break;
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}
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udelay (100);
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}
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} else
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debug ("ax88180: Auto-negotiation is disabled.\n");
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debug ("ax88180: BMCR=0x%04x, BMSR=0x%04x\n",
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(unsigned int)bmcr_val, (unsigned int)bmsr_val);
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/* Get real media mode here */
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switch (priv->PhyID0) {
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case MARVELL_ALASKA_PHYSID0:
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RealMediaMode = get_MarvellPHY_media_mode(dev);
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break;
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case CICADA_CIS8201_PHYSID0:
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RealMediaMode = get_CicadaPHY_media_mode(dev);
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break;
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default:
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RealMediaMode = MEDIA_1000FULL;
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break;
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}
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priv->LinkState = INS_LINK_UP;
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switch (RealMediaMode) {
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case MEDIA_1000FULL:
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debug ("ax88180: 1000Mbps Full-duplex mode.\n");
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rxcfg_val = RXFLOW_ENABLE | DEFAULT_RXCFG;
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maccfg0_val = TXFLOW_ENABLE | DEFAULT_MACCFG0;
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maccfg1_val = GIGA_MODE_EN | RXFLOW_EN |
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FULLDUPLEX | DEFAULT_MACCFG1;
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break;
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case MEDIA_1000HALF:
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debug ("ax88180: 1000Mbps Half-duplex mode.\n");
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rxcfg_val = DEFAULT_RXCFG;
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maccfg0_val = DEFAULT_MACCFG0;
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maccfg1_val = GIGA_MODE_EN | DEFAULT_MACCFG1;
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break;
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case MEDIA_100FULL:
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debug ("ax88180: 100Mbps Full-duplex mode.\n");
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rxcfg_val = RXFLOW_ENABLE | DEFAULT_RXCFG;
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maccfg0_val = SPEED100 | TXFLOW_ENABLE
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| DEFAULT_MACCFG0;
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maccfg1_val = RXFLOW_EN | FULLDUPLEX | DEFAULT_MACCFG1;
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break;
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case MEDIA_100HALF:
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debug ("ax88180: 100Mbps Half-duplex mode.\n");
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rxcfg_val = DEFAULT_RXCFG;
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maccfg0_val = SPEED100 | DEFAULT_MACCFG0;
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maccfg1_val = DEFAULT_MACCFG1;
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break;
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case MEDIA_10FULL:
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debug ("ax88180: 10Mbps Full-duplex mode.\n");
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rxcfg_val = RXFLOW_ENABLE | DEFAULT_RXCFG;
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maccfg0_val = TXFLOW_ENABLE | DEFAULT_MACCFG0;
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maccfg1_val = RXFLOW_EN | FULLDUPLEX | DEFAULT_MACCFG1;
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break;
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case MEDIA_10HALF:
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debug ("ax88180: 10Mbps Half-duplex mode.\n");
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rxcfg_val = DEFAULT_RXCFG;
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maccfg0_val = DEFAULT_MACCFG0;
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maccfg1_val = DEFAULT_MACCFG1;
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break;
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default:
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debug ("ax88180: Unknow media mode.\n");
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rxcfg_val = DEFAULT_RXCFG;
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maccfg0_val = DEFAULT_MACCFG0;
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maccfg1_val = DEFAULT_MACCFG1;
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priv->LinkState = INS_LINK_DOWN;
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break;
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}
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} else {
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rxcfg_val = DEFAULT_RXCFG;
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maccfg0_val = DEFAULT_MACCFG0;
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maccfg1_val = DEFAULT_MACCFG1;
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priv->LinkState = INS_LINK_DOWN;
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}
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OUTW (dev, rxcfg_val, RXCFG);
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OUTW (dev, maccfg0_val, MACCFG0);
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OUTW (dev, maccfg1_val, MACCFG1);
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return;
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}
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static unsigned long get_MarvellPHY_media_mode (struct eth_device *dev)
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{
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unsigned long m88_ssr;
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unsigned long MediaMode;
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m88_ssr = ax88180_mdio_read (dev, M88_SSR);
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switch (m88_ssr & SSR_MEDIA_MASK) {
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case SSR_1000FULL:
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MediaMode = MEDIA_1000FULL;
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break;
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case SSR_1000HALF:
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MediaMode = MEDIA_1000HALF;
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break;
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case SSR_100FULL:
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MediaMode = MEDIA_100FULL;
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break;
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case SSR_100HALF:
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MediaMode = MEDIA_100HALF;
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break;
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case SSR_10FULL:
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MediaMode = MEDIA_10FULL;
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break;
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case SSR_10HALF:
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MediaMode = MEDIA_10HALF;
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break;
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default:
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MediaMode = MEDIA_UNKNOWN;
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break;
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}
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|
return MediaMode;
|
|
}
|
|
|
|
static unsigned long get_CicadaPHY_media_mode (struct eth_device *dev)
|
|
{
|
|
unsigned long tmp_regval;
|
|
unsigned long MediaMode;
|
|
|
|
tmp_regval = ax88180_mdio_read (dev, CIS_AUX_CTRL_STATUS);
|
|
switch (tmp_regval & CIS_MEDIA_MASK) {
|
|
case CIS_1000FULL:
|
|
MediaMode = MEDIA_1000FULL;
|
|
break;
|
|
case CIS_1000HALF:
|
|
MediaMode = MEDIA_1000HALF;
|
|
break;
|
|
case CIS_100FULL:
|
|
MediaMode = MEDIA_100FULL;
|
|
break;
|
|
case CIS_100HALF:
|
|
MediaMode = MEDIA_100HALF;
|
|
break;
|
|
case CIS_10FULL:
|
|
MediaMode = MEDIA_10FULL;
|
|
break;
|
|
case CIS_10HALF:
|
|
MediaMode = MEDIA_10HALF;
|
|
break;
|
|
default:
|
|
MediaMode = MEDIA_UNKNOWN;
|
|
break;
|
|
}
|
|
|
|
return MediaMode;
|
|
}
|
|
|
|
static void ax88180_halt (struct eth_device *dev)
|
|
{
|
|
/* Disable AX88180 TX/RX functions */
|
|
OUTW (dev, WAKEMOD, CMD);
|
|
}
|
|
|
|
static int ax88180_init (struct eth_device *dev, bd_t * bd)
|
|
{
|
|
struct ax88180_private *priv = (struct ax88180_private *)dev->priv;
|
|
unsigned short tmp_regval;
|
|
|
|
ax88180_mac_reset (dev);
|
|
|
|
/* Disable interrupt */
|
|
OUTW (dev, CLEAR_IMR, IMR);
|
|
|
|
/* Disable AX88180 TX/RX functions */
|
|
OUTW (dev, WAKEMOD, CMD);
|
|
|
|
/* Fill the MAC address */
|
|
tmp_regval =
|
|
dev->enetaddr[0] | (((unsigned short)dev->enetaddr[1]) << 8);
|
|
OUTW (dev, tmp_regval, MACID0);
|
|
|
|
tmp_regval =
|
|
dev->enetaddr[2] | (((unsigned short)dev->enetaddr[3]) << 8);
|
|
OUTW (dev, tmp_regval, MACID1);
|
|
|
|
tmp_regval =
|
|
dev->enetaddr[4] | (((unsigned short)dev->enetaddr[5]) << 8);
|
|
OUTW (dev, tmp_regval, MACID2);
|
|
|
|
ax88180_media_config (dev);
|
|
|
|
OUTW (dev, DEFAULT_RXFILTER, RXFILTER);
|
|
|
|
/* Initial variables here */
|
|
priv->FirstTxDesc = TXDP0;
|
|
priv->NextTxDesc = TXDP0;
|
|
|
|
/* Check if there is any invalid interrupt status and clear it. */
|
|
OUTW (dev, INW (dev, ISR), ISR);
|
|
|
|
/* Start AX88180 TX/RX functions */
|
|
OUTW (dev, (RXEN | TXEN | WAKEMOD), CMD);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* Get a data block via Ethernet */
|
|
static int ax88180_recv (struct eth_device *dev)
|
|
{
|
|
unsigned short ISR_Status;
|
|
unsigned short tmp_regval;
|
|
|
|
/* Read and check interrupt status here. */
|
|
ISR_Status = INW (dev, ISR);
|
|
|
|
while (ISR_Status) {
|
|
/* Clear the interrupt status */
|
|
OUTW (dev, ISR_Status, ISR);
|
|
|
|
debug ("\nax88180: The interrupt status = 0x%04x\n",
|
|
ISR_Status);
|
|
|
|
if (ISR_Status & ISR_PHY) {
|
|
/* Read ISR register once to clear PHY interrupt bit */
|
|
tmp_regval = ax88180_mdio_read (dev, M88_ISR);
|
|
ax88180_media_config (dev);
|
|
}
|
|
|
|
if ((ISR_Status & ISR_RX) || (ISR_Status & ISR_RXBUFFOVR)) {
|
|
ax88180_rx_handler (dev);
|
|
}
|
|
|
|
/* Read and check interrupt status again */
|
|
ISR_Status = INW (dev, ISR);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* Send a data block via Ethernet. */
|
|
static int ax88180_send(struct eth_device *dev, void *packet, int length)
|
|
{
|
|
struct ax88180_private *priv = (struct ax88180_private *)dev->priv;
|
|
unsigned short TXDES_addr;
|
|
unsigned short txcmd_txdp, txbs_txdp;
|
|
unsigned short tmp_data;
|
|
int i;
|
|
#if defined (CONFIG_DRIVER_AX88180_16BIT)
|
|
volatile unsigned short *txdata = (volatile unsigned short *)packet;
|
|
#else
|
|
volatile unsigned long *txdata = (volatile unsigned long *)packet;
|
|
#endif
|
|
unsigned short count;
|
|
|
|
if (priv->LinkState != INS_LINK_UP) {
|
|
return 0;
|
|
}
|
|
|
|
priv->FirstTxDesc = priv->NextTxDesc;
|
|
txbs_txdp = 1 << priv->FirstTxDesc;
|
|
|
|
debug ("ax88180: TXDP%d is available\n", priv->FirstTxDesc);
|
|
|
|
txcmd_txdp = priv->FirstTxDesc << 13;
|
|
TXDES_addr = TXDES0 + (priv->FirstTxDesc << 2);
|
|
|
|
OUTW (dev, (txcmd_txdp | length | TX_START_WRITE), TXCMD);
|
|
|
|
/* Comput access times */
|
|
count = (length + priv->PadSize) >> priv->BusWidth;
|
|
|
|
for (i = 0; i < count; i++) {
|
|
WRITE_TXBUF (dev, *(txdata + i));
|
|
}
|
|
|
|
OUTW (dev, txcmd_txdp | length, TXCMD);
|
|
OUTW (dev, txbs_txdp, TXBS);
|
|
OUTW (dev, (TXDPx_ENABLE | length), TXDES_addr);
|
|
|
|
priv->NextTxDesc = (priv->NextTxDesc + 1) & TXDP_MASK;
|
|
|
|
/*
|
|
* Check the available transmit descriptor, if we had exhausted all
|
|
* transmit descriptor ,then we have to wait for at least one free
|
|
* descriptor
|
|
*/
|
|
txbs_txdp = 1 << priv->NextTxDesc;
|
|
tmp_data = INW (dev, TXBS);
|
|
|
|
if (tmp_data & txbs_txdp) {
|
|
if (ax88180_poll_tx_complete (dev) < 0) {
|
|
ax88180_mac_reset (dev);
|
|
priv->FirstTxDesc = TXDP0;
|
|
priv->NextTxDesc = TXDP0;
|
|
printf ("ax88180: Transmit time out occurred!\n");
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void ax88180_read_mac_addr (struct eth_device *dev)
|
|
{
|
|
unsigned short macid0_val, macid1_val, macid2_val;
|
|
unsigned short tmp_regval;
|
|
unsigned short i;
|
|
|
|
/* Reload MAC address from EEPROM */
|
|
OUTW (dev, RELOAD_EEPROM, PROMCTRL);
|
|
|
|
/* Waiting for reload eeprom completion */
|
|
for (i = 0; i < 500; i++) {
|
|
tmp_regval = INW (dev, PROMCTRL);
|
|
if ((tmp_regval & RELOAD_EEPROM) == 0)
|
|
break;
|
|
udelay (1000);
|
|
}
|
|
|
|
/* Get MAC addresses */
|
|
macid0_val = INW (dev, MACID0);
|
|
macid1_val = INW (dev, MACID1);
|
|
macid2_val = INW (dev, MACID2);
|
|
|
|
if (((macid0_val | macid1_val | macid2_val) != 0) &&
|
|
((macid0_val & 0x01) == 0)) {
|
|
dev->enetaddr[0] = (unsigned char)macid0_val;
|
|
dev->enetaddr[1] = (unsigned char)(macid0_val >> 8);
|
|
dev->enetaddr[2] = (unsigned char)macid1_val;
|
|
dev->enetaddr[3] = (unsigned char)(macid1_val >> 8);
|
|
dev->enetaddr[4] = (unsigned char)macid2_val;
|
|
dev->enetaddr[5] = (unsigned char)(macid2_val >> 8);
|
|
}
|
|
}
|
|
|
|
/*
|
|
===========================================================================
|
|
<<<<<< Exported SubProgram Bodies >>>>>>
|
|
===========================================================================
|
|
*/
|
|
int ax88180_initialize (bd_t * bis)
|
|
{
|
|
struct eth_device *dev;
|
|
struct ax88180_private *priv;
|
|
|
|
dev = (struct eth_device *)malloc (sizeof *dev);
|
|
|
|
if (NULL == dev)
|
|
return 0;
|
|
|
|
memset (dev, 0, sizeof *dev);
|
|
|
|
priv = (struct ax88180_private *)malloc (sizeof (*priv));
|
|
|
|
if (NULL == priv)
|
|
return 0;
|
|
|
|
memset (priv, 0, sizeof *priv);
|
|
|
|
strcpy(dev->name, "ax88180");
|
|
dev->iobase = AX88180_BASE;
|
|
dev->priv = priv;
|
|
dev->init = ax88180_init;
|
|
dev->halt = ax88180_halt;
|
|
dev->send = ax88180_send;
|
|
dev->recv = ax88180_recv;
|
|
|
|
priv->BusWidth = BUS_WIDTH_32;
|
|
priv->PadSize = 3;
|
|
#if defined (CONFIG_DRIVER_AX88180_16BIT)
|
|
OUTW (dev, (START_BASE >> 8), BASE);
|
|
OUTW (dev, DECODE_EN, DECODE);
|
|
|
|
priv->BusWidth = BUS_WIDTH_16;
|
|
priv->PadSize = 1;
|
|
#endif
|
|
|
|
ax88180_mac_reset (dev);
|
|
|
|
/* Disable interrupt */
|
|
OUTW (dev, CLEAR_IMR, IMR);
|
|
|
|
/* Disable AX88180 TX/RX functions */
|
|
OUTW (dev, WAKEMOD, CMD);
|
|
|
|
ax88180_read_mac_addr (dev);
|
|
|
|
eth_register (dev);
|
|
|
|
return ax88180_phy_initial (dev);
|
|
|
|
}
|
|
|