upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support

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Liu Gang 3f1af81b80 powerpc/corenet_ds: Slave uploads ucode when boot from SRIO ... When boot from SRIO, slave's ucode can be stored in master's memory space, then slave can fetch the ucode image through SRIO interface. For the corenet platform, ucode is for Fman. Master needs to: 1. Put the slave's ucode image into it's own memory space. 2. Set an inbound SRIO window covered slave's ucode stored in master's memory space. Slave needs to: 1. Set a specific TLB entry in order to fetch ucode from master. 2. Set a LAW entry with the TargetID SRIO1 or SRIO2 for ucode. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>		13 years ago
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p_corenet	…
Makefile	…
cadmus.c	…
cadmus.h	…
cds_pci_ft.c	…
cds_via.c	…
eeprom.h	…
fman.c	…
fman.h	…
ics307_clk.c	…
ics307_clk.h	…
ngpixis.c	…
ngpixis.h	…
pixis.c	…
pixis.h	…
pq-mds-pib.c	…
pq-mds-pib.h	…
qixis.c	…
qixis.h	…
sdhc_boot.c	…
sgmii_riser.c	…
sgmii_riser.h	…
sys_eeprom.c	…
via.h	…