upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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74 lines
2.5 KiB
74 lines
2.5 KiB
/*
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* (C) Copyright 2009 SAMSUNG Electronics
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* Minkyu Kang <mk7.kang@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#ifndef __ASM_ARCH_MMC_H_
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#define __ASM_ARCH_MMC_H_
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#define SDHCI_CONTROL2 0x80
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#define SDHCI_CONTROL3 0x84
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#define SDHCI_CONTROL4 0x8C
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#define SDHCI_CTRL2_ENSTAASYNCCLR (1 << 31)
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#define SDHCI_CTRL2_ENCMDCNFMSK (1 << 30)
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#define SDHCI_CTRL2_CDINVRXD3 (1 << 29)
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#define SDHCI_CTRL2_SLCARDOUT (1 << 28)
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#define SDHCI_CTRL2_FLTCLKSEL_MASK (0xf << 24)
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#define SDHCI_CTRL2_FLTCLKSEL_SHIFT (24)
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#define SDHCI_CTRL2_FLTCLKSEL(_x) ((_x) << 24)
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#define SDHCI_CTRL2_LVLDAT_MASK (0xff << 16)
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#define SDHCI_CTRL2_LVLDAT_SHIFT (16)
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#define SDHCI_CTRL2_LVLDAT(_x) ((_x) << 16)
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#define SDHCI_CTRL2_ENFBCLKTX (1 << 15)
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#define SDHCI_CTRL2_ENFBCLKRX (1 << 14)
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#define SDHCI_CTRL2_SDCDSEL (1 << 13)
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#define SDHCI_CTRL2_SDSIGPC (1 << 12)
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#define SDHCI_CTRL2_ENBUSYCHKTXSTART (1 << 11)
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#define SDHCI_CTRL2_DFCNT_MASK(_x) ((_x) << 9)
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#define SDHCI_CTRL2_DFCNT_SHIFT (9)
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#define SDHCI_CTRL2_ENCLKOUTHOLD (1 << 8)
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#define SDHCI_CTRL2_RWAITMODE (1 << 7)
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#define SDHCI_CTRL2_DISBUFRD (1 << 6)
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#define SDHCI_CTRL2_SELBASECLK_MASK(_x) ((_x) << 4)
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#define SDHCI_CTRL2_SELBASECLK_SHIFT (4)
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#define SDHCI_CTRL2_PWRSYNC (1 << 3)
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#define SDHCI_CTRL2_ENCLKOUTMSKCON (1 << 1)
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#define SDHCI_CTRL2_HWINITFIN (1 << 0)
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#define SDHCI_CTRL3_FCSEL3 (1 << 31)
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#define SDHCI_CTRL3_FCSEL2 (1 << 23)
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#define SDHCI_CTRL3_FCSEL1 (1 << 15)
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#define SDHCI_CTRL3_FCSEL0 (1 << 7)
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#define SDHCI_CTRL4_DRIVE_MASK(_x) ((_x) << 16)
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#define SDHCI_CTRL4_DRIVE_SHIFT (16)
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int s5p_sdhci_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks);
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static inline unsigned int s5p_mmc_init(int index, int bus_width)
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{
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unsigned int base = samsung_get_base_mmc() + (0x10000 * index);
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return s5p_sdhci_init(base, 52000000, 400000, index);
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}
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#endif
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