upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
You can not select more than 25 topics
Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
1.1 KiB
1.1 KiB
U-boot config options used in fec_mxc.c
CONFIG_FEC_MXC
Selects fec_mxc.c to be compiled into u-boot. Can read out the
ethaddr from the SoC eFuses (see below).
CONFIG_MII
Must be defined if CONFIG_FEC_MXC is defined.
CONFIG_FEC_XCV_TYPE
Defaults to MII100 for 100 Base-tx.
RGMII selects 1000 Base-tx reduced pin count interface.
RMII selects 100 Base-tx reduced pin count interface.
CONFIG_FEC_MXC_SWAP_PACKET
Forced on iff MX28.
Swaps the bytes order of all words(4 byte units) in the packet.
This should not be specified by a board file. It is cpu specific.
CONFIG_PHYLIB
fec_mxc supports PHYLIB and should be used for new boards.
CONFIG_FEC_MXC_NO_ANEG
Relevant only if PHYLIB not used. Skips auto-negotiation restart.
CONFIG_FEC_MXC_PHYADDR
Optional, selects the exact phy address that should be connected
and function fecmxc_initialize will try to initialize it.
Reading the ethaddr from the SoC eFuses:
if CONFIG_FEC_MXC is defined and the U-Boot environment does not contain the
ethaddr variable, then its value gets read from the corresponding eFuses in
the SoC. See the README files of the specific SoC for details.