upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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33 lines
949 B
33 lines
949 B
/*
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* (C) Copyright 2012 SAMSUNG Electronics
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* Jaehoon Chung <jh80.chung@samsung.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#define DWMCI_CLKSEL 0x09C
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#define DWMCI_SHIFT_0 0x0
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#define DWMCI_SHIFT_1 0x1
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#define DWMCI_SHIFT_2 0x2
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#define DWMCI_SHIFT_3 0x3
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#define DWMCI_SET_SAMPLE_CLK(x) (x)
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#define DWMCI_SET_DRV_CLK(x) ((x) << 16)
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#define DWMCI_SET_DIV_RATIO(x) ((x) << 24)
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#define EMMCP_MPSBEGIN0 0x1200
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#define EMMCP_SEND0 0x1204
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#define EMMCP_CTRL0 0x120C
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#define MPSCTRL_SECURE_READ_BIT (0x1<<7)
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#define MPSCTRL_SECURE_WRITE_BIT (0x1<<6)
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#define MPSCTRL_NON_SECURE_READ_BIT (0x1<<5)
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#define MPSCTRL_NON_SECURE_WRITE_BIT (0x1<<4)
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#define MPSCTRL_USE_FUSE_KEY (0x1<<3)
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#define MPSCTRL_ECB_MODE (0x1<<2)
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#define MPSCTRL_ENCRYPTION (0x1<<1)
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#define MPSCTRL_VALID (0x1<<0)
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#ifdef CONFIG_OF_CONTROL
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int exynos_dwmmc_init(const void *blob);
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#endif
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int exynos_dwmci_add_port(int index, u32 regbase, int bus_width, u32 clksel);
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