upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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182 lines
4.6 KiB
182 lines
4.6 KiB
/*
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* (C) Copyright 2011 Comelit Group SpA
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* Luca Ceresoli <luca.ceresoli@comelit.it>
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*
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* Based on board/ti/beagle/beagle.c:
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* (C) Copyright 2004-2008
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* Texas Instruments, <www.ti.com>
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*
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* Author :
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* Sunil Kumar <sunilsaini05@gmail.com>
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* Shashi Ranjan <shashiranjanmca05@gmail.com>
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*
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* Derived from Beagle Board and 3430 SDP code by
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* Richard Woodruff <r-woodruff2@ti.com>
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* Syed Mohammed Khasim <khasim@ti.com>
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*
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <netdev.h>
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#include <twl4030.h>
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#include <asm/io.h>
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#include <asm/arch/mmc_host_def.h>
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#include <asm/arch/omap3-regs.h>
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#include <asm/arch/mux.h>
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#include <asm/arch/mem.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/gpio.h>
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#include <asm/mach-types.h>
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#include "dig297.h"
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DECLARE_GLOBAL_DATA_PTR;
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#ifdef CONFIG_CMD_NET
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static void setup_net_chip(void);
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#define NET_LAN9221_RESET_GPIO 12
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/* GPMC CS 5 connected to an SMSC LAN9220 ethernet controller */
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#define NET_LAN9220_GPMC_CONFIG1 (DEVICESIZE_16BIT)
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#define NET_LAN9220_GPMC_CONFIG2 (CSWROFFTIME(8) | \
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CSRDOFFTIME(7) | \
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ADVONTIME(1))
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#define NET_LAN9220_GPMC_CONFIG3 (ADVWROFFTIME(2) | \
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ADVRDOFFTIME(2) | \
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ADVONTIME(1))
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#define NET_LAN9220_GPMC_CONFIG4 (WEOFFTIME(8) | \
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WEONTIME(1) | \
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OEOFFTIME(7)| \
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OEONTIME(1))
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#define NET_LAN9220_GPMC_CONFIG5 (PAGEBURSTACCESSTIME(0) | \
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RDACCESSTIME(6) | \
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WRCYCLETIME(0x1D) | \
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RDCYCLETIME(0x1D))
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#define NET_LAN9220_GPMC_CONFIG6 ((1 << 31) | \
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WRACCESSTIME(0x1D) | \
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WRDATAONADMUXBUS(3))
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static const u32 gpmc_lan_config[] = {
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NET_LAN9220_GPMC_CONFIG1,
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NET_LAN9220_GPMC_CONFIG2,
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NET_LAN9220_GPMC_CONFIG3,
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NET_LAN9220_GPMC_CONFIG4,
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NET_LAN9220_GPMC_CONFIG5,
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NET_LAN9220_GPMC_CONFIG6,
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/* CONFIG7: computed by enable_gpmc_cs_config() */
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};
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#endif /* CONFIG_CMD_NET */
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/*
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* Routine: board_init
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* Description: Early hardware init.
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*/
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int board_init(void)
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{
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gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
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/* boot param addr */
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gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
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return 0;
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}
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/*
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* Routine: misc_init_r
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* Description: Configure board specific parts
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*/
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int misc_init_r(void)
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{
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struct gpio *gpio1_base = (struct gpio *)OMAP34XX_GPIO1_BASE;
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struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE;
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twl4030_power_init();
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twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
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/*
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* GPIO list
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* - 159 OUT (GPIO5+31): reset for remote camera interface connector.
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* - 19 OUT (GPIO1+19): integrated speaker amplifier (1=on, 0=shdn).
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* - 20 OUT (GPIO1+20): handset amplifier (1=on, 0=shdn).
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*/
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/* Configure GPIOs to output */
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writel(~(GPIO19 | GPIO20), &gpio1_base->oe);
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writel(~(GPIO31), &gpio5_base->oe);
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/* Set GPIO values */
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writel((GPIO19 | GPIO20), &gpio1_base->setdataout);
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writel(0, &gpio5_base->setdataout);
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#if defined(CONFIG_CMD_NET)
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setup_net_chip();
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#endif
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dieid_num_r();
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return 0;
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}
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/*
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* Routine: set_muxconf_regs
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* Description: Setting up the configuration Mux registers specific to the
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* hardware. Many pins need to be moved from protect to primary
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* mode.
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*/
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void set_muxconf_regs(void)
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{
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MUX_DIG297();
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}
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#ifdef CONFIG_GENERIC_MMC
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int board_mmc_init(bd_t *bis)
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{
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return omap_mmc_init(0, 0, 0, -1, -1);
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}
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void board_mmc_power_init(void)
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{
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twl4030_power_mmc_init(0);
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}
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#endif
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#ifdef CONFIG_CMD_NET
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/*
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* Routine: setup_net_chip
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* Description: Setting up the configuration GPMC registers specific to the
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* Ethernet hardware.
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*/
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static void setup_net_chip(void)
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{
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struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
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/* Configure GPMC registers */
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enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5],
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CONFIG_SMC911X_BASE, GPMC_SIZE_16M);
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/* Enable off mode for NWE in PADCONF_GPMC_NWE register */
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writew(readw(&ctrl_base->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
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/* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
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writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
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/* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
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writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
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&ctrl_base->gpmc_nadv_ale);
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/* Make GPIO 12 as output pin and send a magic pulse through it */
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if (!gpio_request(NET_LAN9221_RESET_GPIO, "")) {
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gpio_direction_output(NET_LAN9221_RESET_GPIO, 0);
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gpio_set_value(NET_LAN9221_RESET_GPIO, 1);
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udelay(1);
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gpio_set_value(NET_LAN9221_RESET_GPIO, 0);
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udelay(31000); /* Should be >= 30ms according to datasheet */
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gpio_set_value(NET_LAN9221_RESET_GPIO, 1);
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}
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}
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#endif /* CONFIG_CMD_NET */
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
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return rc;
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}
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