upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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265 lines
8.1 KiB
265 lines
8.1 KiB
/*
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* Copyright (C) 2013, Intel Corporation
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* Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
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* Copyright (C) 2015, Kodak Alaris, Inc
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*
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* SPDX-License-Identifier: Intel
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*/
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#include <common.h>
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#include <fdtdec.h>
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#include <asm/arch/fsp/azalia.h>
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#include <asm/fsp/fsp_support.h>
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DECLARE_GLOBAL_DATA_PTR;
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/* ALC262 Verb Table - 10EC0262 */
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static const uint32_t verb_table_data13[] = {
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/* Pin Complex (NID 0x11) */
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0x01171cf0,
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0x01171d11,
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0x01171e11,
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0x01171f41,
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/* Pin Complex (NID 0x12) */
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0x01271cf0,
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0x01271d11,
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0x01271e11,
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0x01271f41,
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/* Pin Complex (NID 0x14) */
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0x01471c10,
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0x01471d40,
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0x01471e01,
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0x01471f01,
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/* Pin Complex (NID 0x15) */
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0x01571cf0,
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0x01571d11,
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0x01571e11,
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0x01571f41,
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/* Pin Complex (NID 0x16) */
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0x01671cf0,
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0x01671d11,
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0x01671e11,
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0x01671f41,
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/* Pin Complex (NID 0x18) */
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0x01871c20,
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0x01871d98,
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0x01871ea1,
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0x01871f01,
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/* Pin Complex (NID 0x19) */
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0x01971c21,
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0x01971d98,
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0x01971ea1,
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0x01971f02,
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/* Pin Complex (NID 0x1A) */
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0x01a71c2f,
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0x01a71d30,
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0x01a71e81,
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0x01a71f01,
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/* Pin Complex */
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0x01b71c1f,
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0x01b71d40,
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0x01b71e21,
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0x01b71f02,
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/* Pin Complex */
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0x01c71cf0,
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0x01c71d11,
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0x01c71e11,
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0x01c71f41,
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/* Pin Complex */
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0x01d71c01,
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0x01d71dc6,
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0x01d71e14,
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0x01d71f40,
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/* Pin Complex */
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0x01e71cf0,
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0x01e71d11,
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0x01e71e11,
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0x01e71f41,
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/* Pin Complex */
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0x01f71cf0,
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0x01f71d11,
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0x01f71e11,
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0x01f71f41,
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};
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/*
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* This needs to be in ROM since if we put it in CAR, FSP init loses it when
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* it drops CAR.
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*
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* TODO(sjg@chromium.org): Move to device tree when FSP allows it
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*
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* VerbTable: (RealTek ALC262)
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* Revision ID = 0xFF, support all steps
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* Codec Verb Table For AZALIA
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* Codec Address: CAd value (0/1/2)
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* Codec Vendor: 0x10EC0262
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*/
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static const struct pch_azalia_verb_table azalia_verb_table[] = {
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{
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{
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0x10ec0262,
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0x0000,
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0xff,
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0x01,
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0x000b,
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0x0002,
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},
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verb_table_data13
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}
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};
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const struct pch_azalia_config azalia_config = {
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.pme_enable = 1,
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.docking_supported = 1,
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.docking_attached = 0,
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.hdmi_codec_enable = 1,
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.azalia_v_ci_enable = 1,
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.rsvdbits = 0,
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.azalia_verb_table_num = 1,
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.azalia_verb_table = azalia_verb_table,
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.reset_wait_timer_us = 300
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};
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/**
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* Override the FSP's configuration data.
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* If the device tree does not specify an integer setting, use the default
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* provided in Intel's Baytrail_FSP_Gold4.tgz release FSP/BayleyBayFsp.bsf file.
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*/
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void update_fsp_configs(struct fsp_config_data *config,
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struct fspinit_rtbuf *rt_buf)
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{
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struct upd_region *fsp_upd = &config->fsp_upd;
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struct memory_down_data *mem;
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const void *blob = gd->fdt_blob;
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int node;
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/* Initialize runtime buffer for fsp_init() */
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rt_buf->common.stack_top = config->common.stack_top - 32;
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rt_buf->common.boot_mode = config->common.boot_mode;
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rt_buf->common.upd_data = &config->fsp_upd;
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fsp_upd->azalia_config_ptr = (uint32_t)&azalia_config;
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node = fdtdec_next_compatible(blob, 0, COMPAT_INTEL_BAYTRAIL_FSP);
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if (node < 0) {
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debug("%s: Cannot find FSP node\n", __func__);
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return;
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}
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fsp_upd->mrc_init_tseg_size = fdtdec_get_int(blob, node,
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"fsp,mrc-init-tseg-size",
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0);
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fsp_upd->mrc_init_mmio_size = fdtdec_get_int(blob, node,
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"fsp,mrc-init-mmio-size",
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0x800);
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fsp_upd->mrc_init_spd_addr1 = fdtdec_get_int(blob, node,
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"fsp,mrc-init-spd-addr1",
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0xa0);
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fsp_upd->mrc_init_spd_addr2 = fdtdec_get_int(blob, node,
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"fsp,mrc-init-spd-addr2",
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0xa2);
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fsp_upd->emmc_boot_mode = fdtdec_get_int(blob, node,
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"fsp,emmc-boot-mode", 2);
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fsp_upd->enable_sdio = fdtdec_get_bool(blob, node, "fsp,enable-sdio");
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fsp_upd->enable_sdcard = fdtdec_get_bool(blob, node,
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"fsp,enable-sdcard");
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fsp_upd->enable_hsuart0 = fdtdec_get_bool(blob, node,
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"fsp,enable-hsuart0");
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fsp_upd->enable_hsuart1 = fdtdec_get_bool(blob, node,
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"fsp,enable-hsuart1");
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fsp_upd->enable_spi = fdtdec_get_bool(blob, node, "fsp,enable-spi");
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fsp_upd->enable_sata = fdtdec_get_bool(blob, node, "fsp,enable-sata");
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fsp_upd->sata_mode = fdtdec_get_int(blob, node, "fsp,sata-mode", 1);
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fsp_upd->enable_azalia = fdtdec_get_bool(blob, node,
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"fsp,enable-azalia");
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fsp_upd->enable_xhci = fdtdec_get_bool(blob, node, "fsp,enable-xhci");
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fsp_upd->enable_lpe = fdtdec_get_bool(blob, node, "fsp,enable-lpe");
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fsp_upd->lpss_sio_enable_pci_mode = fdtdec_get_bool(blob, node,
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"fsp,lpss-sio-enable-pci-mode");
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fsp_upd->enable_dma0 = fdtdec_get_bool(blob, node, "fsp,enable-dma0");
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fsp_upd->enable_dma1 = fdtdec_get_bool(blob, node, "fsp,enable-dma1");
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fsp_upd->enable_i2_c0 = fdtdec_get_bool(blob, node, "fsp,enable-i2c0");
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fsp_upd->enable_i2_c1 = fdtdec_get_bool(blob, node, "fsp,enable-i2c1");
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fsp_upd->enable_i2_c2 = fdtdec_get_bool(blob, node, "fsp,enable-i2c2");
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fsp_upd->enable_i2_c3 = fdtdec_get_bool(blob, node, "fsp,enable-i2c3");
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fsp_upd->enable_i2_c4 = fdtdec_get_bool(blob, node, "fsp,enable-i2c4");
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fsp_upd->enable_i2_c5 = fdtdec_get_bool(blob, node, "fsp,enable-i2c5");
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fsp_upd->enable_i2_c6 = fdtdec_get_bool(blob, node, "fsp,enable-i2c6");
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fsp_upd->enable_pwm0 = fdtdec_get_bool(blob, node, "fsp,enable-pwm0");
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fsp_upd->enable_pwm1 = fdtdec_get_bool(blob, node, "fsp,enable-pwm1");
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fsp_upd->enable_hsi = fdtdec_get_bool(blob, node, "fsp,enable-hsi");
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fsp_upd->igd_dvmt50_pre_alloc = fdtdec_get_int(blob, node,
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"fsp,igd-dvmt50-pre-alloc", 2);
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fsp_upd->aperture_size = fdtdec_get_int(blob, node, "fsp,aperture-size",
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2);
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fsp_upd->gtt_size = fdtdec_get_int(blob, node, "fsp,gtt-size", 2);
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fsp_upd->serial_debug_port_address = fdtdec_get_int(blob, node,
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"fsp,serial-debug-port-address", 0x3f8);
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fsp_upd->serial_debug_port_type = fdtdec_get_int(blob, node,
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"fsp,serial-debug-port-type", 1);
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fsp_upd->mrc_debug_msg = fdtdec_get_bool(blob, node,
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"fsp,mrc-debug-msg");
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fsp_upd->isp_enable = fdtdec_get_bool(blob, node, "fsp,isp-enable");
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fsp_upd->scc_enable_pci_mode = fdtdec_get_bool(blob, node,
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"fsp,scc-enable-pci-mode");
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fsp_upd->igd_render_standby = fdtdec_get_bool(blob, node,
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"fsp,igd-render-standby");
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fsp_upd->txe_uma_enable = fdtdec_get_bool(blob, node,
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"fsp,txe-uma-enable");
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fsp_upd->os_selection = fdtdec_get_int(blob, node, "fsp,os-selection",
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4);
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fsp_upd->emmc45_ddr50_enabled = fdtdec_get_bool(blob, node,
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"fsp,emmc45-ddr50-enabled");
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fsp_upd->emmc45_hs200_enabled = fdtdec_get_bool(blob, node,
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"fsp,emmc45-hs200-enabled");
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fsp_upd->emmc45_retune_timer_value = fdtdec_get_int(blob, node,
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"fsp,emmc45-retune-timer-value", 8);
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fsp_upd->enable_igd = fdtdec_get_bool(blob, node, "fsp,enable-igd");
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mem = &fsp_upd->memory_params;
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mem->enable_memory_down = fdtdec_get_bool(blob, node,
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"fsp,enable-memory-down");
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if (mem->enable_memory_down) {
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node = fdtdec_next_compatible(blob, node,
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COMPAT_INTEL_BAYTRAIL_FSP_MDP);
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if (node < 0) {
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debug("%s: Cannot find FSP memory-down-params node\n",
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__func__);
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} else {
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mem->dram_speed = fdtdec_get_int(blob, node,
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"fsp,dram-speed",
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0x02);
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mem->dram_type = fdtdec_get_int(blob, node,
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"fsp,dram-type", 0x01);
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mem->dimm_0_enable = fdtdec_get_bool(blob, node,
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"fsp,dimm-0-enable");
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mem->dimm_1_enable = fdtdec_get_bool(blob, node,
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"fsp,dimm-1-enable");
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mem->dimm_width = fdtdec_get_int(blob, node,
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"fsp,dimm-width",
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0x00);
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mem->dimm_density = fdtdec_get_int(blob, node,
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"fsp,dimm-density",
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0x01);
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mem->dimm_bus_width = fdtdec_get_int(blob, node,
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"fsp,dimm-bus-width", 0x03);
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mem->dimm_sides = fdtdec_get_int(blob, node,
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"fsp,dimm-sides",
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0x00);
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mem->dimm_tcl = fdtdec_get_int(blob, node,
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"fsp,dimm-tcl", 0x09);
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mem->dimm_trpt_rcd = fdtdec_get_int(blob, node,
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"fsp,dimm-trpt-rcd", 0x09);
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mem->dimm_twr = fdtdec_get_int(blob, node,
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"fsp,dimm-twr", 0x0A);
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mem->dimm_twtr = fdtdec_get_int(blob, node,
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"fsp,dimm-twtr", 0x05);
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mem->dimm_trrd = fdtdec_get_int(blob, node,
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"fsp,dimm-trrd", 0x04);
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mem->dimm_trtp = fdtdec_get_int(blob, node,
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"fsp,dimm-trtp", 0x05);
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mem->dimm_tfaw = fdtdec_get_int(blob, node,
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"fsp,dimm-tfaw", 0x14);
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}
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}
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}
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