upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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128 lines
3.1 KiB
128 lines
3.1 KiB
/*
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* Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
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*
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* Based on code:
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* Copyright (C) 2005-2009 Samsung Electronics
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* Kyungmin Park <kyungmin.park@samsung.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <linux/mtd/onenand_regs.h>
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#include <onenand_uboot.h>
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/*
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* Device geometry:
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* - 2048b page, 128k erase block.
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* - 4096b page, 256k erase block.
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*/
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enum onenand_spl_pagesize {
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PAGE_2K = 2048,
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PAGE_4K = 4096,
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};
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#define ONENAND_PAGES_PER_BLOCK 64
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#define onenand_block_address(block) (block)
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#define onenand_sector_address(page) (page << 2)
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#define onenand_buffer_address() ((1 << 3) << 8)
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#define onenand_bufferram_address(block) (0)
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static inline uint16_t onenand_readw(uint32_t addr)
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{
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return readw(CONFIG_SYS_ONENAND_BASE + addr);
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}
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static inline void onenand_writew(uint16_t value, uint32_t addr)
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{
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writew(value, CONFIG_SYS_ONENAND_BASE + addr);
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}
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static enum onenand_spl_pagesize onenand_spl_get_geometry(void)
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{
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uint32_t dev_id, density;
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if (!onenand_readw(ONENAND_REG_TECHNOLOGY)) {
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dev_id = onenand_readw(ONENAND_REG_DEVICE_ID);
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density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
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density &= ONENAND_DEVICE_DENSITY_MASK;
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if (density < ONENAND_DEVICE_DENSITY_4Gb)
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return PAGE_2K;
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if (dev_id & ONENAND_DEVICE_IS_DDP)
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return PAGE_2K;
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}
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return PAGE_4K;
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}
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static int onenand_spl_read_page(uint32_t block, uint32_t page, uint32_t *buf,
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enum onenand_spl_pagesize pagesize)
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{
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const uint32_t addr = CONFIG_SYS_ONENAND_BASE + ONENAND_DATARAM;
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uint32_t offset;
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onenand_writew(onenand_block_address(block),
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ONENAND_REG_START_ADDRESS1);
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onenand_writew(onenand_bufferram_address(block),
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ONENAND_REG_START_ADDRESS2);
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onenand_writew(onenand_sector_address(page),
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ONENAND_REG_START_ADDRESS8);
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onenand_writew(onenand_buffer_address(),
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ONENAND_REG_START_BUFFER);
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onenand_writew(ONENAND_INT_CLEAR, ONENAND_REG_INTERRUPT);
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onenand_writew(ONENAND_CMD_READ, ONENAND_REG_COMMAND);
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while (!(onenand_readw(ONENAND_REG_INTERRUPT) & ONENAND_INT_READ))
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continue;
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/* Check for invalid block mark */
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if (page < 2 && (onenand_readw(ONENAND_SPARERAM) != 0xffff))
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return 1;
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for (offset = 0; offset < pagesize; offset += 4)
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buf[offset / 4] = readl(addr + offset);
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return 0;
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}
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void onenand_spl_load_image(uint32_t offs, uint32_t size, void *dst)
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{
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uint32_t *addr = (uint32_t *)dst;
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uint32_t to_page;
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uint32_t block;
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uint32_t page, rpage;
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enum onenand_spl_pagesize pagesize;
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int ret;
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pagesize = onenand_spl_get_geometry();
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/*
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* The page can be either 2k or 4k, avoid using DIV_ROUND_UP to avoid
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* pulling further unwanted functions into the SPL.
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*/
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if (pagesize == 2048) {
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page = offs / 2048;
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to_page = page + DIV_ROUND_UP(size, 2048);
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} else {
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page = offs / 4096;
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to_page = page + DIV_ROUND_UP(size, 4096);
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}
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for (; page <= to_page; page++) {
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block = page / ONENAND_PAGES_PER_BLOCK;
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rpage = page & (ONENAND_PAGES_PER_BLOCK - 1);
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ret = onenand_spl_read_page(block, rpage, addr, pagesize);
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if (ret)
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page += ONENAND_PAGES_PER_BLOCK - 1;
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else
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addr += pagesize / 4;
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}
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}
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