upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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150 lines
5.6 KiB
150 lines
5.6 KiB
/*
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* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <dm/device.h>
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#include <dm/pinctrl.h>
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#include "pinctrl-uniphier.h"
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static const struct uniphier_pinctrl_pin uniphier_pro4_pins[] = {
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};
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static const unsigned emmc_pins[] = {40, 41, 42, 43, 51, 52, 53};
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static const int emmc_muxvals[] = {1, 1, 1, 1, 1, 1, 1};
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static const unsigned emmc_dat8_pins[] = {44, 45, 46, 47};
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static const int emmc_dat8_muxvals[] = {1, 1, 1, 1};
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static const unsigned ether_mii_pins[] = {160, 161, 162, 163, 164, 165, 166,
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167, 168, 169, 170, 171, 172, 173,
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174, 175, 176, 177, 178, 179};
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static const int ether_mii_muxvals[] = {1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0};
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static const unsigned ether_rgmii_pins[] = {160, 161, 162, 163, 164, 165, 167,
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168, 169, 170, 171, 172, 176, 177,
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178, 179};
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static const int ether_rgmii_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0};
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static const unsigned ether_rmii_pins[] = {160, 161, 162, 165, 168, 169, 172,
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173, 176, 177, 178, 179};
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static const int ether_rmii_muxvals[] = {1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
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static const unsigned ether_rmiib_pins[] = {161, 162, 165, 167, 168, 169, 172,
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173, 176, 177, 178, 179};
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static const int ether_rmiib_muxvals[] = {0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0};
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static const unsigned i2c0_pins[] = {142, 143};
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static const int i2c0_muxvals[] = {0, 0};
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static const unsigned i2c1_pins[] = {144, 145};
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static const int i2c1_muxvals[] = {0, 0};
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static const unsigned i2c2_pins[] = {146, 147};
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static const int i2c2_muxvals[] = {0, 0};
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static const unsigned i2c3_pins[] = {148, 149};
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static const int i2c3_muxvals[] = {0, 0};
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static const unsigned i2c6_pins[] = {308, 309};
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static const int i2c6_muxvals[] = {6, 6};
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static const unsigned nand_pins[] = {40, 41, 42, 43, 44, 45, 46, 47, 48, 49,
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50, 51, 52, 53, 54};
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static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
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static const unsigned nand_cs1_pins[] = {131, 132};
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static const int nand_cs1_muxvals[] = {1, 1};
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static const unsigned sd_pins[] = {150, 151, 152, 153, 154, 155, 156, 157, 158};
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static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
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static const unsigned sd1_pins[] = {319, 320, 321, 322, 323, 324, 325, 326,
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327};
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static const int sd1_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
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static const unsigned uart0_pins[] = {127, 128};
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static const int uart0_muxvals[] = {0, 0};
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static const unsigned uart1_pins[] = {129, 130};
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static const int uart1_muxvals[] = {0, 0};
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static const unsigned uart2_pins[] = {131, 132};
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static const int uart2_muxvals[] = {0, 0};
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static const unsigned uart3_pins[] = {88, 89};
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static const int uart3_muxvals[] = {2, 2};
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static const unsigned usb0_pins[] = {180, 181};
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static const int usb0_muxvals[] = {0, 0};
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static const unsigned usb1_pins[] = {182, 183};
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static const int usb1_muxvals[] = {0, 0};
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static const unsigned usb2_pins[] = {184, 185};
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static const int usb2_muxvals[] = {0, 0};
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static const unsigned usb3_pins[] = {186, 187};
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static const int usb3_muxvals[] = {0, 0};
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static const struct uniphier_pinctrl_group uniphier_pro4_groups[] = {
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UNIPHIER_PINCTRL_GROUP_SPL(emmc),
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UNIPHIER_PINCTRL_GROUP_SPL(emmc_dat8),
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UNIPHIER_PINCTRL_GROUP(ether_mii),
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UNIPHIER_PINCTRL_GROUP(ether_rgmii),
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UNIPHIER_PINCTRL_GROUP(ether_rmii),
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UNIPHIER_PINCTRL_GROUP(ether_rmiib),
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UNIPHIER_PINCTRL_GROUP(i2c0),
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UNIPHIER_PINCTRL_GROUP(i2c1),
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UNIPHIER_PINCTRL_GROUP(i2c2),
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UNIPHIER_PINCTRL_GROUP(i2c3),
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UNIPHIER_PINCTRL_GROUP(i2c6),
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UNIPHIER_PINCTRL_GROUP(nand),
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UNIPHIER_PINCTRL_GROUP(nand_cs1),
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UNIPHIER_PINCTRL_GROUP(sd),
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UNIPHIER_PINCTRL_GROUP(sd1),
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UNIPHIER_PINCTRL_GROUP_SPL(uart0),
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UNIPHIER_PINCTRL_GROUP_SPL(uart1),
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UNIPHIER_PINCTRL_GROUP_SPL(uart2),
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UNIPHIER_PINCTRL_GROUP_SPL(uart3),
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UNIPHIER_PINCTRL_GROUP(usb0),
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UNIPHIER_PINCTRL_GROUP(usb1),
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UNIPHIER_PINCTRL_GROUP(usb2),
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UNIPHIER_PINCTRL_GROUP(usb3),
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};
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static const char * const uniphier_pro4_functions[] = {
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UNIPHIER_PINMUX_FUNCTION_SPL(emmc),
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UNIPHIER_PINMUX_FUNCTION(ether_mii),
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UNIPHIER_PINMUX_FUNCTION(ether_rgmii),
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UNIPHIER_PINMUX_FUNCTION(ether_rmii),
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UNIPHIER_PINMUX_FUNCTION(i2c0),
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UNIPHIER_PINMUX_FUNCTION(i2c1),
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UNIPHIER_PINMUX_FUNCTION(i2c2),
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UNIPHIER_PINMUX_FUNCTION(i2c3),
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UNIPHIER_PINMUX_FUNCTION(i2c6),
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UNIPHIER_PINMUX_FUNCTION(nand),
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UNIPHIER_PINMUX_FUNCTION(sd),
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UNIPHIER_PINMUX_FUNCTION(sd1),
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UNIPHIER_PINMUX_FUNCTION_SPL(uart0),
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UNIPHIER_PINMUX_FUNCTION_SPL(uart1),
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UNIPHIER_PINMUX_FUNCTION_SPL(uart2),
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UNIPHIER_PINMUX_FUNCTION_SPL(uart3),
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UNIPHIER_PINMUX_FUNCTION(usb0),
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UNIPHIER_PINMUX_FUNCTION(usb1),
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UNIPHIER_PINMUX_FUNCTION(usb2),
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UNIPHIER_PINMUX_FUNCTION(usb3),
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};
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static struct uniphier_pinctrl_socdata uniphier_pro4_pinctrl_socdata = {
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.pins = uniphier_pro4_pins,
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.pins_count = ARRAY_SIZE(uniphier_pro4_pins),
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.groups = uniphier_pro4_groups,
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.groups_count = ARRAY_SIZE(uniphier_pro4_groups),
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.functions = uniphier_pro4_functions,
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.functions_count = ARRAY_SIZE(uniphier_pro4_functions),
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.caps = UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE,
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};
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static int uniphier_pro4_pinctrl_probe(struct udevice *dev)
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{
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return uniphier_pinctrl_probe(dev, &uniphier_pro4_pinctrl_socdata);
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}
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static const struct udevice_id uniphier_pro4_pinctrl_match[] = {
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{ .compatible = "socionext,uniphier-pro4-pinctrl" },
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{ /* sentinel */ }
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};
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U_BOOT_DRIVER(uniphier_pro4_pinctrl) = {
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.name = "uniphier-pro4-pinctrl",
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.id = UCLASS_PINCTRL,
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.of_match = of_match_ptr(uniphier_pro4_pinctrl_match),
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.probe = uniphier_pro4_pinctrl_probe,
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.remove = uniphier_pinctrl_remove,
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.priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv),
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.ops = &uniphier_pinctrl_ops,
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.flags = DM_FLAG_PRE_RELOC,
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};
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