upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support

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Kumar Gala 79e4e6480b powerpc/8xxx: Enabled hwconfig for memory interleaving ... Replace environmental variables memctl_intlv_ctl and ba_intlv_ctl with hwconfig parameters. The syntax is setenv hwconfig "fsl_ddr:ctlr_intlv=<mode>,bank_intlv=<mode>" The mode values for memory controller interleaving are cacheline page bank superbank The mode values for bank interleaving are cs0_cs1 cs2_cs3 cs0_cs1_and_cs2_cs3 cs0_cs1_cs2_cs3 Signed-off-by: York Sun <yorksun@freescale.com>		14 years ago
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ddr	powerpc/8xxx: Enabled hwconfig for memory interleaving	14 years ago
Makefile	…
cpu.c	powerpc/p3041: Add various p3041 related defines	14 years ago
fdt.c	…
fsl_lbc.c	…
pci_cfg.c	…