upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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122 lines
2.3 KiB
122 lines
2.3 KiB
// SPDX-License-Identifier: GPL-2.0
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/*
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* Marvell OpenRD (Base|Client|Ultimate) Board Description
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*
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* Andrew Lunn <andrew@lunn.ch>
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*
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* This file contains the definitions that are common between the three
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* variants of the Marvell Kirkwood Development Board.
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*/
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#include "kirkwood.dtsi"
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#include "kirkwood-6281.dtsi"
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/ {
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memory {
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device_type = "memory";
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reg = <0x00000000 0x20000000>;
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};
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chosen {
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bootargs = "console=ttyS0,115200n8";
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stdout-path = &uart0;
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};
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ocp@f1000000 {
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pinctrl: pin-controller@10000 {
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pinctrl-0 = <&pmx_select28 &pmx_sdio_cd &pmx_select34>;
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pinctrl-names = "default";
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pmx_select28: pmx-select-rs232-rs485 {
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marvell,pins = "mpp28";
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marvell,function = "gpio";
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};
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pmx_sdio_cd: pmx-sdio-cd {
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marvell,pins = "mpp29";
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marvell,function = "gpio";
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};
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pmx_select34: pmx-select-uart-sd {
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marvell,pins = "mpp34";
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marvell,function = "gpio";
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};
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};
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serial@12000 {
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status = "okay";
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};
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sata@80000 {
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status = "okay";
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nr-ports = <2>;
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};
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mvsdio@90000 {
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status = "okay";
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cd-gpios = <&gpio0 29 9>;
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};
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gpio@10100 {
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p28 {
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gpio-hog;
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gpios = <28 GPIO_ACTIVE_HIGH>;
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/*
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* SelRS232or485 selects between RS-232 or RS-485
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* mode for the second UART.
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*
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* Low: RS-232
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* High: RS-485
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*
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* To use the second UART, you need to change also
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* the SelUARTorSD.
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*/
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output-low;
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line-name = "SelRS232or485";
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};
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};
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gpio@10140 {
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p2 {
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gpio-hog;
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gpios = <2 GPIO_ACTIVE_HIGH>;
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/*
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* SelUARTorSD selects between the second UART
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* (serial@12100) and SD (mvsdio@90000).
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*
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* Low: UART
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* High: SD
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*
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* When changing this line make sure the newly
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* selected device node is enabled and the
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* previously selected device node is disabled.
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*/
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output-high; /* Select SD by default */
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line-name = "SelUARTorSD";
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};
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};
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};
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};
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&nand {
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status = "okay";
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pinctrl-0 = <&pmx_nand>;
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pinctrl-names = "default";
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partition@0 {
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label = "u-boot";
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reg = <0x0000000 0x100000>;
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};
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partition@100000 {
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label = "uImage";
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reg = <0x0100000 0x400000>;
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};
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partition@600000 {
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label = "root";
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reg = <0x0600000 0x1FA00000>;
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};
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};
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&pciec {
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status = "okay";
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};
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&pcie0 {
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status = "okay";
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};
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