upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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53 lines
1.1 KiB
53 lines
1.1 KiB
// SPDX-License-Identifier: GPL-2.0+
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//
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// Device Tree Source for Actions Semi S900 SoC
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//
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// Copyright (C) 2015 Actions Semi Co., Ltd.
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// Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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/dts-v1/;
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#include <dt-bindings/clock/s900_cmu.h>
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/ {
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compatible = "actions,s900";
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#address-cells = <0x2>;
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#size-cells = <0x2>;
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losc: losc {
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compatible = "fixed-clock";
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clock-frequency = <32768>;
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#clock-cells = <0>;
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};
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diff24M: diff24M {
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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#clock-cells = <0>;
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};
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soc {
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u-boot,dm-pre-reloc;
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compatible = "simple-bus";
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#address-cells = <0x2>;
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#size-cells = <0x2>;
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ranges;
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uart5: serial@e012a000 {
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u-boot,dm-pre-reloc;
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compatible = "actions,s900-serial";
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reg = <0x0 0xe012a000 0x0 0x1000>;
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clocks = <&cmu CLOCK_UART5>;
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status = "disabled";
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};
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cmu: clock-controller@e0160000 {
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u-boot,dm-pre-reloc;
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compatible = "actions,s900-cmu";
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reg = <0x0 0xe0160000 0x0 0x1000>;
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clocks = <&losc>, <&diff24M>;
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clock-names = "losc", "diff24M";
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#clock-cells = <1>;
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};
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};
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};
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