upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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95 lines
1.6 KiB
95 lines
1.6 KiB
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2014 - 2017 Xilinx, Inc. Michal Simek
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*/
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#include <common.h>
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#include <debug_uart.h>
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#include <spl.h>
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#include <asm/io.h>
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#include <asm/spl.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/ps7_init_gpl.h>
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void board_init_f(ulong dummy)
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{
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ps7_init();
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arch_cpu_init();
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#ifdef CONFIG_DEBUG_UART
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/* Uart debug for sure */
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debug_uart_init();
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puts("Debug uart enabled\n"); /* or printch() */
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#endif
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}
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#ifdef CONFIG_SPL_BOARD_INIT
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void spl_board_init(void)
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{
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preloader_console_init();
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#if defined(CONFIG_ARCH_EARLY_INIT_R) && defined(CONFIG_SPL_FPGA_SUPPORT)
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arch_early_init_r();
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#endif
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board_init();
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}
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#endif
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u32 spl_boot_device(void)
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{
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u32 mode;
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switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
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#ifdef CONFIG_SPL_SPI_SUPPORT
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case ZYNQ_BM_QSPI:
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puts("qspi boot\n");
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mode = BOOT_DEVICE_SPI;
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break;
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#endif
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case ZYNQ_BM_NAND:
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mode = BOOT_DEVICE_NAND;
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break;
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case ZYNQ_BM_NOR:
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mode = BOOT_DEVICE_NOR;
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break;
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#ifdef CONFIG_SPL_MMC_SUPPORT
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case ZYNQ_BM_SD:
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puts("mmc boot\n");
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mode = BOOT_DEVICE_MMC1;
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break;
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#endif
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case ZYNQ_BM_JTAG:
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mode = BOOT_DEVICE_RAM;
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break;
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default:
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puts("Unsupported boot mode selected\n");
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hang();
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}
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return mode;
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}
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#ifdef CONFIG_SPL_OS_BOOT
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int spl_start_uboot(void)
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{
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/* boot linux */
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return 0;
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}
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#endif
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void spl_board_prepare_for_boot(void)
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{
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ps7_post_config();
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debug("SPL bye\n");
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}
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#ifdef CONFIG_SPL_LOAD_FIT
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int board_fit_config_name_match(const char *name)
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{
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/* Just empty function now - can't decide what to choose */
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debug("%s: %s\n", __func__, name);
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return 0;
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}
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#endif
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