upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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303 lines
5.8 KiB
303 lines
5.8 KiB
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* MCF5272 Internal Memory Map
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*
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* Copyright (c) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
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*/
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#ifndef __IMMAP_5272__
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#define __IMMAP_5272__
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#define MMAP_CFG (CONFIG_SYS_MBAR + 0x00000000)
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#define MMAP_INTC (CONFIG_SYS_MBAR + 0x00000020)
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#define MMAP_FBCS (CONFIG_SYS_MBAR + 0x00000040)
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#define MMAP_GPIO (CONFIG_SYS_MBAR + 0x00000080)
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#define MMAP_QSPI (CONFIG_SYS_MBAR + 0x000000A0)
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#define MMAP_PWM (CONFIG_SYS_MBAR + 0x000000C0)
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#define MMAP_DMA0 (CONFIG_SYS_MBAR + 0x000000E0)
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#define MMAP_UART0 (CONFIG_SYS_MBAR + 0x00000100)
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#define MMAP_UART1 (CONFIG_SYS_MBAR + 0x00000140)
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#define MMAP_SDRAM (CONFIG_SYS_MBAR + 0x00000180)
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#define MMAP_TMR0 (CONFIG_SYS_MBAR + 0x00000200)
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#define MMAP_TMR1 (CONFIG_SYS_MBAR + 0x00000220)
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#define MMAP_TMR2 (CONFIG_SYS_MBAR + 0x00000240)
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#define MMAP_TMR3 (CONFIG_SYS_MBAR + 0x00000260)
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#define MMAP_WDOG (CONFIG_SYS_MBAR + 0x00000280)
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#define MMAP_PLIC (CONFIG_SYS_MBAR + 0x00000300)
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#define MMAP_FEC (CONFIG_SYS_MBAR + 0x00000840)
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#define MMAP_USB (CONFIG_SYS_MBAR + 0x00001000)
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#include <asm/coldfire/pwm.h>
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/* System configuration registers */
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typedef struct sys_ctrl {
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uint sc_mbar;
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ushort sc_scr;
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ushort sc_spr;
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uint sc_pmr;
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char res1[2];
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ushort sc_alpr;
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uint sc_dir;
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char res2[12];
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} sysctrl_t;
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/* Interrupt module registers */
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typedef struct int_ctrl {
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uint int_icr1;
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uint int_icr2;
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uint int_icr3;
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uint int_icr4;
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uint int_isr;
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uint int_pitr;
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uint int_piwr;
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uchar res1[3];
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uchar int_pivr;
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} intctrl_t;
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/* Chip select module registers */
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typedef struct cs_ctlr {
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uint cs_br0;
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uint cs_or0;
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uint cs_br1;
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uint cs_or1;
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uint cs_br2;
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uint cs_or2;
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uint cs_br3;
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uint cs_or3;
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uint cs_br4;
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uint cs_or4;
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uint cs_br5;
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uint cs_or5;
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uint cs_br6;
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uint cs_or6;
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uint cs_br7;
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uint cs_or7;
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} csctrl_t;
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/* GPIO port registers */
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typedef struct gpio_ctrl {
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uint gpio_pacnt;
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ushort gpio_paddr;
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ushort gpio_padat;
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uint gpio_pbcnt;
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ushort gpio_pbddr;
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ushort gpio_pbdat;
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uchar res1[4];
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ushort gpio_pcddr;
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ushort gpio_pcdat;
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uint gpio_pdcnt;
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uchar res2[4];
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} gpio_t;
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/* DMA module registers */
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typedef struct dma_ctrl {
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ulong dma_dmr;
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uchar res1[2];
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ushort dma_dir;
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ulong dma_dbcr;
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ulong dma_dsar;
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ulong dma_ddar;
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uchar res2[12];
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} dma_t;
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/* SDRAM controller registers, offset: 0x180 */
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typedef struct sdram_ctrl {
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uchar res1[2];
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ushort sdram_sdcr;
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uchar res2[2];
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ushort sdram_sdtr;
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uchar res3[120];
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} sdramctrl_t;
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/* Watchdog registers */
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typedef struct wdog_ctrl {
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ushort wdog_wrrr;
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ushort res1;
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ushort wdog_wirr;
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ushort res2;
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ushort wdog_wcr;
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ushort res3;
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ushort wdog_wer;
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uchar res4[114];
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} wdog_t;
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/* PLIC module registers */
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typedef struct plic_ctrl {
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ulong plic_p0b1rr;
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ulong plic_p1b1rr;
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ulong plic_p2b1rr;
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ulong plic_p3b1rr;
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ulong plic_p0b2rr;
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ulong plic_p1b2rr;
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ulong plic_p2b2rr;
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ulong plic_p3b2rr;
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uchar plic_p0drr;
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uchar plic_p1drr;
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uchar plic_p2drr;
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uchar plic_p3drr;
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uchar res1[4];
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ulong plic_p0b1tr;
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ulong plic_p1b1tr;
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ulong plic_p2b1tr;
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ulong plic_p3b1tr;
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ulong plic_p0b2tr;
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ulong plic_p1b2tr;
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ulong plic_p2b2tr;
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ulong plic_p3b2tr;
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uchar plic_p0dtr;
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uchar plic_p1dtr;
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uchar plic_p2dtr;
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uchar plic_p3dtr;
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uchar res2[4];
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ushort plic_p0cr;
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ushort plic_p1cr;
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ushort plic_p2cr;
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ushort plic_p3cr;
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ushort plic_p0icr;
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ushort plic_p1icr;
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ushort plic_p2icr;
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ushort plic_p3icr;
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ushort plic_p0gmr;
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ushort plic_p1gmr;
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ushort plic_p2gmr;
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ushort plic_p3gmr;
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ushort plic_p0gmt;
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ushort plic_p1gmt;
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ushort plic_p2gmt;
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ushort plic_p3gmt;
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uchar res3;
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uchar plic_pgmts;
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uchar plic_pgmta;
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uchar res4;
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uchar plic_p0gcir;
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uchar plic_p1gcir;
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uchar plic_p2gcir;
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uchar plic_p3gcir;
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uchar plic_p0gcit;
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uchar plic_p1gcit;
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uchar plic_p2gcit;
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uchar plic_p3gcit;
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uchar res5[3];
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uchar plic_pgcitsr;
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uchar res6[3];
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uchar plic_pdcsr;
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ushort plic_p0psr;
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ushort plic_p1psr;
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ushort plic_p2psr;
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ushort plic_p3psr;
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ushort plic_pasr;
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uchar res7;
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uchar plic_plcr;
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ushort res8;
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ushort plic_pdrqr;
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ushort plic_p0sdr;
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ushort plic_p1sdr;
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ushort plic_p2sdr;
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ushort plic_p3sdr;
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ushort res9;
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ushort plic_pcsr;
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uchar res10[1184];
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} plic_t;
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/* USB module registers */
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typedef struct usb {
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ushort res1;
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ushort usb_fnr;
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ushort res2;
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ushort usb_fnmr;
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ushort res3;
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ushort usb_rfmr;
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ushort res4;
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ushort usb_rfmmr;
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uchar res5[3];
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uchar usb_far;
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ulong usb_asr;
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ulong usb_drr1;
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ulong usb_drr2;
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ushort res6;
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ushort usb_specr;
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ushort res7;
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ushort usb_ep0sr;
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ulong usb_iep0cfg;
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ulong usb_oep0cfg;
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ulong usb_ep1cfg;
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ulong usb_ep2cfg;
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ulong usb_ep3cfg;
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ulong usb_ep4cfg;
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ulong usb_ep5cfg;
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ulong usb_ep6cfg;
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ulong usb_ep7cfg;
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ulong usb_ep0ctl;
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ushort res8;
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ushort usb_ep1ctl;
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ushort res9;
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ushort usb_ep2ctl;
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ushort res10;
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ushort usb_ep3ctl;
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ushort res11;
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ushort usb_ep4ctl;
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ushort res12;
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ushort usb_ep5ctl;
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ushort res13;
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ushort usb_ep6ctl;
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ushort res14;
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ushort usb_ep7ctl;
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ulong usb_ep0isr;
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ushort res15;
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ushort usb_ep1isr;
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ushort res16;
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ushort usb_ep2isr;
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ushort res17;
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ushort usb_ep3isr;
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ushort res18;
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ushort usb_ep4isr;
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ushort res19;
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ushort usb_ep5isr;
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ushort res20;
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ushort usb_ep6isr;
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ushort res21;
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ushort usb_ep7isr;
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ulong usb_ep0imr;
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ushort res22;
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ushort usb_ep1imr;
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ushort res23;
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ushort usb_ep2imr;
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ushort res24;
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ushort usb_ep3imr;
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ushort res25;
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ushort usb_ep4imr;
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ushort res26;
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ushort usb_ep5imr;
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ushort res27;
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ushort usb_ep6imr;
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ushort res28;
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ushort usb_ep7imr;
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ulong usb_ep0dr;
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ulong usb_ep1dr;
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ulong usb_ep2dr;
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ulong usb_ep3dr;
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ulong usb_ep4dr;
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ulong usb_ep5dr;
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ulong usb_ep6dr;
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ulong usb_ep7dr;
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ushort res29;
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ushort usb_ep0dpr;
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ushort res30;
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ushort usb_ep1dpr;
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ushort res31;
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ushort usb_ep2dpr;
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ushort res32;
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ushort usb_ep3dpr;
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ushort res33;
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ushort usb_ep4dpr;
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ushort res34;
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ushort usb_ep5dpr;
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ushort res35;
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ushort usb_ep6dpr;
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ushort res36;
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ushort usb_ep7dpr;
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uchar res37[788];
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uchar usb_cfgram[1024];
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} usb_t;
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#endif /* __IMMAP_5272__ */
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