upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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137 lines
2.6 KiB
137 lines
2.6 KiB
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2014 Google, Inc
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* Written by Simon Glass <sjg@chromium.org>
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*/
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/*
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* IO space access commands.
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*/
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#include <common.h>
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#include <command.h>
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#include <dm.h>
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#include <asm/io.h>
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int pci_map_physmem(phys_addr_t paddr, unsigned long *lenp,
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struct udevice **devp, void **ptrp)
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{
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struct udevice *dev;
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int ret;
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*ptrp = 0;
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for (uclass_first_device(UCLASS_PCI_EMUL, &dev);
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dev;
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uclass_next_device(&dev)) {
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struct dm_pci_emul_ops *ops = pci_get_emul_ops(dev);
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if (!ops || !ops->map_physmem)
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continue;
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ret = (ops->map_physmem)(dev, paddr, lenp, ptrp);
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if (ret)
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continue;
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*devp = dev;
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return 0;
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}
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debug("%s: failed: addr=%x\n", __func__, paddr);
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return -ENOSYS;
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}
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int pci_unmap_physmem(const void *vaddr, unsigned long len,
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struct udevice *dev)
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{
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struct dm_pci_emul_ops *ops = pci_get_emul_ops(dev);
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if (!ops || !ops->unmap_physmem)
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return -ENOSYS;
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return (ops->unmap_physmem)(dev, vaddr, len);
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}
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static int pci_io_read(unsigned int addr, ulong *valuep, pci_size_t size)
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{
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struct udevice *dev;
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int ret;
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*valuep = pci_get_ff(size);
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for (uclass_first_device(UCLASS_PCI_EMUL, &dev);
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dev;
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uclass_next_device(&dev)) {
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struct dm_pci_emul_ops *ops = pci_get_emul_ops(dev);
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if (ops && ops->read_io) {
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ret = (ops->read_io)(dev, addr, valuep, size);
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if (!ret)
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return 0;
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}
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}
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debug("%s: failed: addr=%x\n", __func__, addr);
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return -ENOSYS;
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}
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static int pci_io_write(unsigned int addr, ulong value, pci_size_t size)
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{
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struct udevice *dev;
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int ret;
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for (uclass_first_device(UCLASS_PCI_EMUL, &dev);
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dev;
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uclass_next_device(&dev)) {
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struct dm_pci_emul_ops *ops = pci_get_emul_ops(dev);
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if (ops && ops->write_io) {
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ret = (ops->write_io)(dev, addr, value, size);
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if (!ret)
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return 0;
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}
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}
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debug("%s: failed: addr=%x, value=%lx\n", __func__, addr, value);
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return -ENOSYS;
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}
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int inl(unsigned int addr)
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{
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unsigned long value;
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int ret;
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ret = pci_io_read(addr, &value, PCI_SIZE_32);
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return ret ? 0 : value;
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}
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int inw(unsigned int addr)
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{
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unsigned long value;
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int ret;
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ret = pci_io_read(addr, &value, PCI_SIZE_16);
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return ret ? 0 : value;
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}
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int inb(unsigned int addr)
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{
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unsigned long value;
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int ret;
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ret = pci_io_read(addr, &value, PCI_SIZE_8);
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return ret ? 0 : value;
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}
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void outl(unsigned int value, unsigned int addr)
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{
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pci_io_write(addr, value, PCI_SIZE_32);
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}
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void outw(unsigned int value, unsigned int addr)
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{
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pci_io_write(addr, value, PCI_SIZE_16);
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}
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void outb(unsigned int value, unsigned int addr)
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{
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pci_io_write(addr, value, PCI_SIZE_8);
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}
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