upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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wdenk
c837dcb1a3
|
21 years ago | |
|---|---|---|
| .. | ||
| Makefile | ||
| config.mk | ||
| flash.c | ||
| mii_phy.c | ||
| readme | ||
| rpxsuper.c | ||
| rpxsuper.h | ||
| u-boot.lds | ||
readme
Hi,
so this is the port to the Embedded Planet RPX Super Board.
ATTENTION
This code is only tested on the AY-Version, which is an early release with some
hardware bugs. The main problem is that this board uses the default Hard Reset
Configuration Word and not the 4 bytes located at start of FLASH because at
0xFE000000 is no FLASH. The FLASH consists out of 4 chips each 16bits wide. Be
carefull, the bytes are swapped. So DQ0-7 is the high byte, DQ8-15 ist the low
byte.
The icache can only manually be enabled after reset.
The FLASH and main SDRAM is working with icache enabled.
The local SDRAM can only be used as data memory when icache is enabled.
If U-Boot runs in local SDRAM, TFTP does not work.
The functions in mii_phy.c are all working. Call mii_phy_discover() out of
eth_init() and solve the linker error.
I2C, RTC/NVRAM and PCMCIA are not working yet.
TODO
The 32MB local SDRAM is working but not shown in the startup messages of
U-Boot. If you locate U-Boot or any other program to this area it won't run.
Turning the ichache off does not solve this problem.
As I won't buy another RPX Super there might be some little work to do for you
getting this U-Boot port running on the final board.
frank.morauf@salzbrenner.com