upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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59 lines
1.8 KiB
59 lines
1.8 KiB
/*
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* board/renesas/rcar-gen2-common/common.c
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*
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* Copyright (C) 2013 Renesas Electronics Corporation
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* Copyright (C) 2013 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/rmobile.h>
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#include <asm/arch/rcar-mstp.h>
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#define TSTR0 0x04
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#define TSTR0_STR0 0x01
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static struct mstp_ctl mstptbl[] = {
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{ SMSTPCR0, MSTP0_BITS, CONFIG_SMSTP0_ENA,
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RMSTPCR0, MSTP0_BITS, CONFIG_RMSTP0_ENA },
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{ SMSTPCR1, MSTP1_BITS, CONFIG_SMSTP1_ENA,
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RMSTPCR1, MSTP1_BITS, CONFIG_RMSTP1_ENA },
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{ SMSTPCR2, MSTP2_BITS, CONFIG_SMSTP2_ENA,
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RMSTPCR2, MSTP2_BITS, CONFIG_RMSTP2_ENA },
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{ SMSTPCR3, MSTP3_BITS, CONFIG_SMSTP3_ENA,
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RMSTPCR3, MSTP3_BITS, CONFIG_RMSTP3_ENA },
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{ SMSTPCR4, MSTP4_BITS, CONFIG_SMSTP4_ENA,
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RMSTPCR4, MSTP4_BITS, CONFIG_RMSTP4_ENA },
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{ SMSTPCR5, MSTP5_BITS, CONFIG_SMSTP5_ENA,
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RMSTPCR5, MSTP5_BITS, CONFIG_RMSTP5_ENA },
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/* No MSTP6 */
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{ SMSTPCR7, MSTP7_BITS, CONFIG_SMSTP7_ENA,
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RMSTPCR7, MSTP7_BITS, CONFIG_RMSTP7_ENA },
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{ SMSTPCR8, MSTP8_BITS, CONFIG_SMSTP8_ENA,
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RMSTPCR8, MSTP8_BITS, CONFIG_RMSTP8_ENA },
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{ SMSTPCR9, MSTP9_BITS, CONFIG_SMSTP9_ENA,
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RMSTPCR9, MSTP9_BITS, CONFIG_RMSTP9_ENA },
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{ SMSTPCR10, MSTP10_BITS, CONFIG_SMSTP10_ENA,
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RMSTPCR10, MSTP10_BITS, CONFIG_RMSTP10_ENA },
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{ SMSTPCR11, MSTP11_BITS, CONFIG_SMSTP1_ENA,
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RMSTPCR11, MSTP11_BITS, CONFIG_RMSTP11_ENA },
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};
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void arch_preboot_os(void)
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{
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int i;
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/* stop TMU0 */
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mstp_clrbits_le32(TMU_BASE + TSTR0, TMU_BASE + TSTR0, TSTR0_STR0);
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/* Stop module clock */
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for (i = 0; i < ARRAY_SIZE(mstptbl); i++) {
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mstp_setclrbits_le32(mstptbl[i].s_addr, mstptbl[i].s_dis,
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mstptbl[i].s_ena);
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mstp_setclrbits_le32(mstptbl[i].r_addr, mstptbl[i].r_dis,
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mstptbl[i].r_ena);
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}
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}
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