upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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162 lines
3.6 KiB
162 lines
3.6 KiB
/*
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* U-boot - main board file
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*
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* Copyright (c) 2008-2009 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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#include <common.h>
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#include <config.h>
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#include <command.h>
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#include <net.h>
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#include <netdev.h>
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#include <spi.h>
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#include <asm/blackfin.h>
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#include <asm/portmux.h>
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#include <asm/mach-common/bits/otp.h>
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#include <asm/sdh.h>
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DECLARE_GLOBAL_DATA_PTR;
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int checkboard(void)
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{
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printf("Board: ADI BF518F EZ-Board board\n");
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printf(" Support: http://blackfin.uclinux.org/\n");
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return 0;
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}
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#if defined(CONFIG_BFIN_MAC)
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static void board_init_enetaddr(uchar *mac_addr)
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{
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#ifndef CONFIG_SYS_NO_FLASH
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/* we cram the MAC in the last flash sector */
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uchar *board_mac_addr = (uchar *)0x203F0096;
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if (is_valid_ethaddr(board_mac_addr)) {
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memcpy(mac_addr, board_mac_addr, 6);
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eth_setenv_enetaddr("ethaddr", mac_addr);
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}
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#endif
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}
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/* Only the first run of boards had a KSZ switch */
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#if defined(CONFIG_BFIN_SPI) && __SILICON_REVISION__ == 0
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# define KSZ_POSSIBLE 1
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#else
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# define KSZ_POSSIBLE 0
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#endif
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#define KSZ_MAX_HZ 5000000
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#define KSZ_WRITE 0x02
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#define KSZ_READ 0x03
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#define KSZ_REG_CHID 0x00 /* Register 0: Chip ID0 */
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#define KSZ_REG_STPID 0x01 /* Register 1: Chip ID1 / Start Switch */
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#define KSZ_REG_GC9 0x0b /* Register 11: Global Control 9 */
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#define KSZ_REG_P3C0 0x30 /* Register 48: Port 3 Control 0 */
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static int ksz8893m_transfer(struct spi_slave *slave, uchar dir, uchar reg,
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uchar data, uchar result[3])
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{
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unsigned char dout[3] = { dir, reg, data, };
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return spi_xfer(slave, sizeof(dout) * 8, dout, result, SPI_XFER_BEGIN | SPI_XFER_END);
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}
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static int ksz8893m_reg_set(struct spi_slave *slave, uchar reg, uchar data)
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{
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unsigned char din[3];
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return ksz8893m_transfer(slave, KSZ_WRITE, reg, data, din);
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}
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static int ksz8893m_reg_read(struct spi_slave *slave, uchar reg)
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{
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int ret;
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unsigned char din[3];
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ret = ksz8893m_transfer(slave, KSZ_READ, reg, 0, din);
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return ret ? ret : din[2];
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}
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static int ksz8893m_reg_clear(struct spi_slave *slave, uchar reg, uchar mask)
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{
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return ksz8893m_reg_set(slave, reg, ksz8893m_reg_read(slave, reg) & mask);
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}
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static int ksz8893m_reset(struct spi_slave *slave)
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{
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int ret = 0;
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/* Disable STPID mode */
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ret |= ksz8893m_reg_clear(slave, KSZ_REG_GC9, 0x01);
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/* Disable VLAN tag insert on Port3 */
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ret |= ksz8893m_reg_clear(slave, KSZ_REG_P3C0, 0x04);
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/* Start switch */
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ret |= ksz8893m_reg_set(slave, KSZ_REG_STPID, 0x01);
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return ret;
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}
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static bool board_ksz_init(void)
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{
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static bool switch_is_alive = false;
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if (!switch_is_alive) {
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struct spi_slave *slave = spi_setup_slave(0, 1, KSZ_MAX_HZ, SPI_MODE_3);
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if (slave) {
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if (!spi_claim_bus(slave)) {
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bool phy_is_ksz = (ksz8893m_reg_read(slave, KSZ_REG_CHID) == 0x88);
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int ret = phy_is_ksz ? ksz8893m_reset(slave) : 0;
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switch_is_alive = (ret == 0);
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spi_release_bus(slave);
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}
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spi_free_slave(slave);
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}
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}
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return switch_is_alive;
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}
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int board_eth_init(bd_t *bis)
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{
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if (KSZ_POSSIBLE) {
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if (!board_ksz_init())
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return 0;
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}
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return bfin_EMAC_initialize(bis);
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}
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#endif
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int misc_init_r(void)
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{
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#ifdef CONFIG_BFIN_MAC
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uchar enetaddr[6];
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if (!eth_getenv_enetaddr("ethaddr", enetaddr))
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board_init_enetaddr(enetaddr);
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#endif
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#ifndef CONFIG_SYS_NO_FLASH
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/* we use the last sector for the MAC address / POST LDR */
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extern flash_info_t flash_info[];
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flash_protect(FLAG_PROTECT_SET, 0x203F0000, 0x203FFFFF, &flash_info[0]);
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#endif
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return 0;
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}
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int board_early_init_f(void)
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{
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/* connect async banks by default */
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const unsigned short pins[] = {
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P_AMS2, P_AMS3, 0,
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};
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return peripheral_request_list(pins, "async");
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}
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#ifdef CONFIG_BFIN_SDH
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int board_mmc_init(bd_t *bis)
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{
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return bfin_mmc_init(bis);
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}
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#endif
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