upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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69 lines
1.2 KiB
69 lines
1.2 KiB
/*
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* (C) Copyright 2004
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* Vincent Dubey, Xa SA, vincent.dubey@xa-ch.com
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*
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* (C) Copyright 2002
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* Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <netdev.h>
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#include <asm/arch/pxa.h>
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* Miscelaneous platform dependent initialisations
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*/
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int board_init (void)
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{
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/* We have RAM, disable cache */
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dcache_disable();
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icache_disable();
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/* arch number of xaeniax */
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gd->bd->bi_arch_number = 585;
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/* adress of boot parameters */
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gd->bd->bi_boot_params = 0xa0000100;
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return 0;
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}
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int board_late_init(void)
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{
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setenv("stdout", "serial");
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setenv("stderr", "serial");
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return 0;
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}
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int dram_init(void)
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{
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pxa2xx_dram_init();
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gd->ram_size = PHYS_SDRAM_1_SIZE;
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return 0;
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}
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void dram_init_banksize(void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
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}
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#ifdef CONFIG_CMD_NET
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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#ifdef CONFIG_SMC91111
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rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
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#endif
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return rc;
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}
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#endif
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