upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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151 lines
3.5 KiB
151 lines
3.5 KiB
/*
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* Copyright (C) 2013 Synopsys, Inc. (www.synopsys.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <common.h>
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#include <dm.h>
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#include <serial.h>
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DECLARE_GLOBAL_DATA_PTR;
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struct arc_serial_regs {
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unsigned int id0;
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unsigned int id1;
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unsigned int id2;
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unsigned int id3;
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unsigned int data;
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unsigned int status;
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unsigned int baudl;
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unsigned int baudh;
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};
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struct arc_serial_platdata {
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struct arc_serial_regs *reg;
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unsigned int uartclk;
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};
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/* Bit definitions of STATUS register */
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#define UART_RXEMPTY (1 << 5)
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#define UART_OVERFLOW_ERR (1 << 1)
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#define UART_TXEMPTY (1 << 7)
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static int arc_serial_setbrg(struct udevice *dev, int baudrate)
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{
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struct arc_serial_platdata *plat = dev->platdata;
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struct arc_serial_regs *const regs = plat->reg;
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int arc_console_baud = gd->cpu_clk / (baudrate * 4) - 1;
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writeb(arc_console_baud & 0xff, ®s->baudl);
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#ifdef CONFIG_ARC
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/*
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* UART ISS(Instruction Set simulator) emulation has a subtle bug:
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* A existing value of Baudh = 0 is used as a indication to startup
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* it's internal state machine.
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* Thus if baudh is set to 0, 2 times, it chokes.
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* This happens with BAUD=115200 and the formaula above
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* Until that is fixed, when running on ISS, we will set baudh to !0
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*/
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if (gd->arch.running_on_hw)
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writeb((arc_console_baud & 0xff00) >> 8, ®s->baudh);
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else
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writeb(1, ®s->baudh);
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#else
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writeb((arc_console_baud & 0xff00) >> 8, ®s->baudh);
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#endif
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return 0;
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}
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static int arc_serial_putc(struct udevice *dev, const char c)
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{
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struct arc_serial_platdata *plat = dev->platdata;
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struct arc_serial_regs *const regs = plat->reg;
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if (c == '\n')
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arc_serial_putc(dev, '\r');
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while (!(readb(®s->status) & UART_TXEMPTY))
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;
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writeb(c, ®s->data);
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return 0;
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}
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static int arc_serial_tstc(struct arc_serial_regs *const regs)
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{
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return !(readb(®s->status) & UART_RXEMPTY);
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}
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static int arc_serial_pending(struct udevice *dev, bool input)
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{
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struct arc_serial_platdata *plat = dev->platdata;
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struct arc_serial_regs *const regs = plat->reg;
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uint32_t status = readb(®s->status);
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if (input)
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return status & UART_RXEMPTY ? 0 : 1;
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else
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return status & UART_TXEMPTY ? 0 : 1;
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}
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static int arc_serial_getc(struct udevice *dev)
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{
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struct arc_serial_platdata *plat = dev->platdata;
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struct arc_serial_regs *const regs = plat->reg;
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while (!arc_serial_tstc(regs))
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;
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/* Check for overflow errors */
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if (readb(®s->status) & UART_OVERFLOW_ERR)
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return 0;
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return readb(®s->data) & 0xFF;
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}
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static int arc_serial_probe(struct udevice *dev)
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{
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return 0;
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}
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static const struct dm_serial_ops arc_serial_ops = {
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.putc = arc_serial_putc,
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.pending = arc_serial_pending,
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.getc = arc_serial_getc,
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.setbrg = arc_serial_setbrg,
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};
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static const struct udevice_id arc_serial_ids[] = {
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{ .compatible = "snps,arc-uart" },
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{ }
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};
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static int arc_serial_ofdata_to_platdata(struct udevice *dev)
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{
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struct arc_serial_platdata *plat = dev_get_platdata(dev);
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DECLARE_GLOBAL_DATA_PTR;
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plat->reg = (struct arc_serial_regs *)dev_get_addr(dev);
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plat->uartclk = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
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"clock-frequency", 0);
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return 0;
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}
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U_BOOT_DRIVER(serial_arc) = {
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.name = "serial_arc",
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.id = UCLASS_SERIAL,
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.of_match = arc_serial_ids,
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.ofdata_to_platdata = arc_serial_ofdata_to_platdata,
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.probe = arc_serial_probe,
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.ops = &arc_serial_ops,
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.flags = DM_FLAG_PRE_RELOC,
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};
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