upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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140 lines
3.3 KiB
140 lines
3.3 KiB
/*
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* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <mmc.h>
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#include <spl.h>
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#include <linux/err.h>
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#include "../sbc/sbc-regs.h"
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#include "../soc-info.h"
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#include "boot-device.h"
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u32 spl_boot_device_raw(void)
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{
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if (boot_is_swapped())
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return BOOT_DEVICE_NOR;
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switch (uniphier_get_soc_type()) {
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#if defined(CONFIG_ARCH_UNIPHIER_SLD3)
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case SOC_UNIPHIER_SLD3:
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return uniphier_sld3_boot_device();
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_LD4) || defined(CONFIG_ARCH_UNIPHIER_PRO4) || \
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defined(CONFIG_ARCH_UNIPHIER_SLD8)
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case SOC_UNIPHIER_LD4:
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case SOC_UNIPHIER_PRO4:
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case SOC_UNIPHIER_SLD8:
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return uniphier_ld4_boot_device();
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_PRO5)
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case SOC_UNIPHIER_PRO5:
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return uniphier_pro5_boot_device();
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_PXS2) || defined(CONFIG_ARCH_UNIPHIER_LD6B)
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case SOC_UNIPHIER_PXS2:
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case SOC_UNIPHIER_LD6B:
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return uniphier_pxs2_boot_device();
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_LD11) || defined(CONFIG_ARCH_UNIPHIER_LD20)
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case SOC_UNIPHIER_LD11:
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case SOC_UNIPHIER_LD20:
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return uniphier_ld20_boot_device();
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#endif
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default:
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return BOOT_DEVICE_NONE;
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}
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}
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u32 spl_boot_device(void)
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{
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u32 mode;
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mode = spl_boot_device_raw();
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switch (uniphier_get_soc_type()) {
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#if defined(CONFIG_ARCH_UNIPHIER_PXS2) || defined(CONFIG_ARCH_UNIPHIER_LD6B)
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case SOC_UNIPHIER_PXS2:
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case SOC_UNIPHIER_LD6B:
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if (mode == BOOT_DEVICE_USB)
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mode = BOOT_DEVICE_NOR;
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break;
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_LD11) || defined(CONFIG_ARCH_UNIPHIER_LD20)
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case SOC_UNIPHIER_LD11:
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case SOC_UNIPHIER_LD20:
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if (mode == BOOT_DEVICE_MMC1 || mode == BOOT_DEVICE_USB)
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mode = BOOT_DEVICE_BOARD;
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break;
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#endif
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default:
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break;
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}
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return mode;
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}
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u32 spl_boot_mode(const u32 boot_device)
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{
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struct mmc *mmc;
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/*
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* work around a bug in the Boot ROM of PH1-sLD3, LD4, Pro4, and sLD8:
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*
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* The boot ROM in these SoCs breaks the PARTITION_CONFIG [179] of
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* Extended CSD register; when switching to the Boot Partition 1, the
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* Boot ROM should issue the SWITCH command (CMD6) with Set Bits for
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* the Access Bits, but in fact it uses Write Byte for the Access Bits.
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* As a result, the BOOT_PARTITION_ENABLE field of the PARTITION_CONFIG
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* is lost. This bug was fixed for PH1-Pro5 and later SoCs.
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*
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* Fixup mmc->part_config here because it is used to determine the
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* partition which the U-Boot image is read from.
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*/
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mmc = find_mmc_device(0);
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mmc->part_config &= ~EXT_CSD_BOOT_PART_NUM(PART_ACCESS_MASK);
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mmc->part_config |= EXT_CSD_BOOT_PARTITION_ENABLE;
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return MMCSD_MODE_EMMCBOOT;
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}
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#if defined(CONFIG_DM_MMC) && !defined(CONFIG_SPL_BUILD)
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static int find_first_mmc_device(void)
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{
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struct mmc *mmc;
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int i;
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for (i = 0; (mmc = find_mmc_device(i)); i++) {
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if (!mmc_init(mmc) && IS_MMC(mmc))
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return i;
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}
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return -ENODEV;
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}
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int mmc_get_env_dev(void)
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{
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return find_first_mmc_device();
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}
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static int do_mmcsetn(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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int dev;
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dev = find_first_mmc_device();
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if (dev < 0)
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return CMD_RET_FAILURE;
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setenv_ulong("mmc_first_dev", dev);
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return CMD_RET_SUCCESS;
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}
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U_BOOT_CMD(
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mmcsetn, 1, 1, do_mmcsetn,
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"Set the first MMC (not SD) dev number to \"mmc_first_dev\" environment",
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""
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);
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#endif
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