upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support

Alexey Brodkin 40a808f173 ARCv2: SLC: Make sure busy bit is set properly on SLC flushing ... As reported in STAR 9001165532, an SLC control reg read (for checking busy state) right after SLC invalidate command may incorrectly return NOT busy causing software to NOT spin-wait while operation is underway. (and for some reason this only happens if L1 cache is also disabled - as required by IOC programming model) Suggested workaround is to do an additional Control Reg read, which ensures the 2nd read gets the right status. Same fix made in Linux kernel: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=c70c473396cbdec1168a6eff60e13029c0916854 Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>		8 years ago
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arc	ARCv2: SLC: Make sure busy bit is set properly on SLC flushing	8 years ago
arm	ARM: Keystone2: Build secure images for K2	8 years ago
avr32	…
m68k	…
microblaze	…
mips	…
nds32	…
nios2	…
powerpc	…
sandbox	…
sh	…
x86	x86: Introduce minimal PMU driver for Intel MID platforms	8 years ago
xtensa	…
.gitignore	…
Kconfig	…