upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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132 lines
3.3 KiB
132 lines
3.3 KiB
/*
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* Copyright (c) 2015 Google, Inc
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* Written by Simon Glass <sjg@chromium.org>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _CLK_H_
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#define _CLK_H_
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#include <errno.h>
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#include <linux/types.h>
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struct udevice;
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int soc_clk_dump(void);
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struct clk_ops {
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/**
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* get_rate() - Get current clock rate
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*
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* @dev: Device to check (UCLASS_CLK)
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* @return clock rate in Hz, or -ve error code
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*/
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ulong (*get_rate)(struct udevice *dev);
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/**
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* set_rate() - Set current clock rate
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*
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* @dev: Device to adjust
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* @rate: New clock rate in Hz
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* @return new rate, or -ve error code
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*/
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ulong (*set_rate)(struct udevice *dev, ulong rate);
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/**
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* enable() - Enable the clock for a peripheral
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*
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* @dev: clock provider
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* @periph: Peripheral ID to enable
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* @return zero on success, or -ve error code
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*/
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int (*enable)(struct udevice *dev, int periph);
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/**
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* get_periph_rate() - Get clock rate for a peripheral
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*
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* @dev: Device to check (UCLASS_CLK)
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* @periph: Peripheral ID to check
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* @return clock rate in Hz, or -ve error code
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*/
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ulong (*get_periph_rate)(struct udevice *dev, int periph);
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/**
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* set_periph_rate() - Set current clock rate for a peripheral
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*
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* @dev: Device to update (UCLASS_CLK)
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* @periph: Peripheral ID to update
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* @return new clock rate in Hz, or -ve error code
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*/
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ulong (*set_periph_rate)(struct udevice *dev, int periph, ulong rate);
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};
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#define clk_get_ops(dev) ((struct clk_ops *)(dev)->driver->ops)
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/**
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* clk_get_rate() - Get current clock rate
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*
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* @dev: Device to check (UCLASS_CLK)
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* @return clock rate in Hz, or -ve error code
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*/
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ulong clk_get_rate(struct udevice *dev);
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/**
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* clk_set_rate() - Set current clock rate
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*
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* @dev: Device to adjust
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* @rate: New clock rate in Hz
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* @return new rate, or -ve error code
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*/
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ulong clk_set_rate(struct udevice *dev, ulong rate);
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/**
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* clk_enable() - Enable the clock for a peripheral
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*
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* @dev: clock provider
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* @periph: Peripheral ID to enable
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* @return zero on success, or -ve error code
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*/
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int clk_enable(struct udevice *dev, int periph);
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/**
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* clk_get_periph_rate() - Get current clock rate for a peripheral
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*
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* @dev: Device to check (UCLASS_CLK)
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* @return clock rate in Hz, -ve error code
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*/
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ulong clk_get_periph_rate(struct udevice *dev, int periph);
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/**
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* clk_set_periph_rate() - Set current clock rate for a peripheral
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*
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* @dev: Device to update (UCLASS_CLK)
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* @periph: Peripheral ID to update
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* @return new clock rate in Hz, or -ve error code
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*/
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ulong clk_set_periph_rate(struct udevice *dev, int periph, ulong rate);
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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/**
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* clk_get_by_index() - look up a clock referenced by a device
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*
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* Parse a device's 'clocks' list, returning information on the indexed clock,
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* ensuring that it is activated.
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*
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* @dev: Device containing the clock reference
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* @index: Clock index to return (0 = first)
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* @clk_devp: Returns clock device
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* @return: Peripheral ID for the device to control. This is the first
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* argument after the clock node phandle. If there is no arguemnt,
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* returns 0. Return -ve error code on any error
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*/
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int clk_get_by_index(struct udevice *dev, int index, struct udevice **clk_devp);
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#else
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static inline int clk_get_by_index(struct udevice *dev, int index,
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struct udevice **clk_devp)
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{
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return -ENOSYS;
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}
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#endif
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#endif /* _CLK_H_ */
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