upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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107 lines
2.6 KiB
107 lines
2.6 KiB
/*
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* Copyright (C) 2011 Andes Technology Corporation
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* Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
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* Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <common.h>
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#include <netdev.h>
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#include <asm/io.h>
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#include <faraday/ftsdc010.h>
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#ifdef CONFIG_FTSMC020
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#include <faraday/ftsmc020.h>
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* Miscellaneous platform dependent initializations
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*/
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int board_init(void)
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{
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/*
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* refer to BOOT_PARAMETER_PA_BASE within
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* "linux/arch/nds32/include/asm/misc_spec.h"
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*/
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gd->bd->bi_arch_number = MACH_TYPE_ADPAG102;
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gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400;
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#if !defined(CONFIG_SYS_NO_FLASH)
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ftsmc020_init(); /* initialize Flash */
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#endif /* CONFIG_SYS_NO_FLASH */
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return 0;
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}
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int dram_init(void)
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{
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unsigned long sdram_base = PHYS_SDRAM_0;
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unsigned long expected_size = PHYS_SDRAM_0_SIZE;
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unsigned long actual_size;
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actual_size = get_ram_size((void *)sdram_base, expected_size);
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gd->ram_size = actual_size;
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if (expected_size != actual_size) {
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printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
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actual_size >> 20, expected_size >> 20);
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}
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return 0;
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}
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int board_eth_init(bd_t *bd)
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{
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return ftgmac100_initialize(bd);
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}
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#if !defined(CONFIG_SYS_NO_FLASH)
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ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
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{
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if (banknum == 0) { /* non-CFI boot flash */
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info->portwidth = FLASH_CFI_8BIT;
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info->chipwidth = FLASH_CFI_BY8;
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info->interface = FLASH_CFI_X8;
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return 1;
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} else {
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return 0;
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}
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}
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#endif /* CONFIG_SYS_NO_FLASH */
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#if defined(CONFIG_CMD_PCI) || defined(CONFIG_PCI)
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void pci_init_board(void)
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{
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/* should be pci_ftpci100_init() */
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extern void pci_ftpci_init();
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pci_ftpci_init();
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}
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#endif
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#ifdef CONFIG_GENERIC_MMC
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int board_mmc_init(bd_t *bis)
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{
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ftsdc010_mmc_init(0);
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return 0;
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}
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#endif
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