upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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194 lines
6.8 KiB
194 lines
6.8 KiB
/*
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* Copyright 2009-2011 Freescale Semiconductor, Inc.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef _FSL_LIODN_H_
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#define _FSL_LIODN_H_
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#include <asm/types.h>
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struct srio_liodn_id_table {
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u32 id[2];
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unsigned long reg_offset[2];
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u8 num_ids;
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u8 portid;
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};
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#define SET_SRIO_LIODN_1(port, idA) \
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{ .id = { idA }, .num_ids = 1, .portid = port, \
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.reg_offset[0] = offsetof(ccsr_gur_t, rio##port##liodnr) \
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+ CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \
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}
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#define SET_SRIO_LIODN_2(port, idA, idB) \
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{ .id = { idA, idB }, .num_ids = 2, .portid = port, \
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.reg_offset[0] = offsetof(ccsr_gur_t, rio##port##liodnr) \
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+ CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \
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.reg_offset[1] = offsetof(ccsr_gur_t, rio##port##maintliodnr) \
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+ CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \
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}
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struct liodn_id_table {
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const char * compat;
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u32 id[2];
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u8 num_ids;
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phys_addr_t compat_offset;
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unsigned long reg_offset;
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};
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extern u32 get_ppid_liodn(int ppid_tbl_idx, int ppid);
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extern void set_liodns(void);
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extern void fdt_fixup_liodn(void *blob);
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#define SET_LIODN_BASE_1(idA) \
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{ .id = { idA }, .num_ids = 1, }
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#define SET_LIODN_BASE_2(idA, idB) \
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{ .id = { idA, idB }, .num_ids = 2 }
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#define SET_LIODN_ENTRY_1(name, idA, off, compatoff) \
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{ .compat = name, \
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.id = { idA }, .num_ids = 1, \
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.reg_offset = off + CONFIG_SYS_CCSRBAR, \
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.compat_offset = compatoff + CONFIG_SYS_CCSRBAR_PHYS, \
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}
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#define SET_LIODN_ENTRY_2(name, idA, idB, off, compatoff) \
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{ .compat = name, \
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.id = { idA, idB }, .num_ids = 2, \
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.reg_offset = off + CONFIG_SYS_CCSRBAR, \
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.compat_offset = compatoff + CONFIG_SYS_CCSRBAR_PHYS, \
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}
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#define SET_GUTS_LIODN(compat, liodn, name, compatoff) \
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SET_LIODN_ENTRY_1(compat, liodn, \
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offsetof(ccsr_gur_t, name) + CONFIG_SYS_MPC85xx_GUTS_OFFSET, \
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compatoff)
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#define SET_USB_LIODN(usbNum, compat, liodn) \
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SET_GUTS_LIODN(compat, liodn, usb##usbNum##liodnr,\
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CONFIG_SYS_MPC85xx_USB##usbNum##_OFFSET)
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#define SET_SATA_LIODN(sataNum, liodn) \
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SET_GUTS_LIODN("fsl,pq-sata-v2", liodn, sata##sataNum##liodnr,\
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CONFIG_SYS_MPC85xx_SATA##sataNum##_OFFSET)
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#define SET_PCI_LIODN(compat, pciNum, liodn) \
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SET_GUTS_LIODN(compat, liodn, pex##pciNum##liodnr,\
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CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET)
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/* reg nodes for DMA start @ 0x300 */
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#define SET_DMA_LIODN(dmaNum, liodn) \
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SET_GUTS_LIODN("fsl,eloplus-dma", liodn, dma##dmaNum##liodnr,\
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CONFIG_SYS_MPC85xx_DMA##dmaNum##_OFFSET + 0x300)
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#define SET_SDHC_LIODN(sdhcNum, liodn) \
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SET_GUTS_LIODN("fsl,esdhc", liodn, sdmmc##sdhcNum##liodnr,\
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CONFIG_SYS_MPC85xx_ESDHC_OFFSET)
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#define SET_QMAN_LIODN(liodn) \
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SET_LIODN_ENTRY_1("fsl,qman", liodn, offsetof(ccsr_qman_t, liodnr) + \
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CONFIG_SYS_FSL_QMAN_OFFSET, \
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CONFIG_SYS_FSL_QMAN_OFFSET)
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#define SET_BMAN_LIODN(liodn) \
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SET_LIODN_ENTRY_1("fsl,bman", liodn, offsetof(ccsr_bman_t, liodnr) + \
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CONFIG_SYS_FSL_BMAN_OFFSET, \
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CONFIG_SYS_FSL_BMAN_OFFSET)
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#define SET_PME_LIODN(liodn) \
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SET_LIODN_ENTRY_1("fsl,pme", liodn, offsetof(ccsr_pme_t, liodnr) + \
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CONFIG_SYS_FSL_CORENET_PME_OFFSET, \
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CONFIG_SYS_FSL_CORENET_PME_OFFSET)
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/* -1 from portID due to how immap has the registers */
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#define FM_PPID_RX_PORT_OFFSET(fmNum, portID) \
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CONFIG_SYS_FSL_FM##fmNum##_OFFSET + \
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offsetof(struct ccsr_fman, fm_bmi_common.fmbm_ppid[portID - 1])
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/* enetNum is 0, 1, 2... so we + 8 for 1g to get to HW Port ID */
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#define SET_FMAN_RX_1G_LIODN(fmNum, enetNum, liodn) \
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SET_LIODN_ENTRY_1("fsl,fman-port-1g-rx", liodn, \
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FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 8), \
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CONFIG_SYS_FSL_FM##fmNum##_RX##enetNum##_1G_OFFSET) \
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/* enetNum is 0, 1, 2... so we + 16 for 10g to get to HW Port ID */
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#define SET_FMAN_RX_10G_LIODN(fmNum, enetNum, liodn) \
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SET_LIODN_ENTRY_1("fsl,fman-port-10g-rx", liodn, \
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FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 16), \
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CONFIG_SYS_FSL_FM##fmNum##_RX##enetNum##_10G_OFFSET) \
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/*
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* handle both old and new versioned SEC properties:
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* "fsl,secX.Y" became "fsl,sec-vX.Y" during development
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*/
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#define SET_SEC_JR_LIODN_ENTRY(jrNum, liodnA, liodnB) \
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SET_LIODN_ENTRY_2("fsl,sec4.0-job-ring", liodnA, liodnB,\
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offsetof(ccsr_sec_t, jrliodnr[jrNum].ls) + \
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CONFIG_SYS_FSL_SEC_OFFSET, \
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CONFIG_SYS_FSL_SEC_OFFSET + 0x1000 + 0x1000 * jrNum), \
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SET_LIODN_ENTRY_2("fsl,sec-v4.0-job-ring", liodnA, liodnB,\
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offsetof(ccsr_sec_t, jrliodnr[jrNum].ls) + \
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CONFIG_SYS_FSL_SEC_OFFSET, \
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CONFIG_SYS_FSL_SEC_OFFSET + 0x1000 + 0x1000 * jrNum)
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/* This is a bit evil since we treat rtic param as both a string & hex value */
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#define SET_SEC_RTIC_LIODN_ENTRY(rtic, liodnA) \
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SET_LIODN_ENTRY_1("fsl,sec4.0-rtic-memory", \
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liodnA, \
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offsetof(ccsr_sec_t, rticliodnr[0x##rtic-0xa].ls) + \
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CONFIG_SYS_FSL_SEC_OFFSET, \
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CONFIG_SYS_FSL_SEC_OFFSET + 0x6100 + 0x20 * (0x##rtic-0xa)), \
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SET_LIODN_ENTRY_1("fsl,sec-v4.0-rtic-memory", \
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liodnA, \
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offsetof(ccsr_sec_t, rticliodnr[0x##rtic-0xa].ls) + \
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CONFIG_SYS_FSL_SEC_OFFSET, \
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CONFIG_SYS_FSL_SEC_OFFSET + 0x6100 + 0x20 * (0x##rtic-0xa))
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#define SET_SEC_DECO_LIODN_ENTRY(num, liodnA, liodnB) \
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SET_LIODN_ENTRY_2(NULL, liodnA, liodnB, \
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offsetof(ccsr_sec_t, decoliodnr[num].ls) + \
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CONFIG_SYS_FSL_SEC_OFFSET, 0)
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#define SET_RAID_ENGINE_JQ_LIODN_ENTRY(jqNum, rNum, liodnA) \
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SET_LIODN_ENTRY_1("fsl,raideng-v1.0-job-ring", \
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liodnA, \
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offsetof(struct ccsr_raide, jq[jqNum].ring[rNum].cfg1) + \
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CONFIG_SYS_FSL_RAID_ENGINE_OFFSET, \
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offsetof(struct ccsr_raide, jq[jqNum].ring[rNum].cfg0) + \
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CONFIG_SYS_FSL_RAID_ENGINE_OFFSET)
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#define SET_RMAN_LIODN(ibNum, liodn) \
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SET_LIODN_ENTRY_1("fsl,rman-inbound-block", liodn, \
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offsetof(struct ccsr_rman, mmitdr) + \
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CONFIG_SYS_FSL_CORENET_RMAN_OFFSET, \
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CONFIG_SYS_FSL_CORENET_RMAN_OFFSET + ibNum * 0x1000)
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extern struct liodn_id_table liodn_tbl[], liodn_bases[], sec_liodn_tbl[];
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extern struct liodn_id_table raide_liodn_tbl[];
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extern struct liodn_id_table fman1_liodn_tbl[], fman2_liodn_tbl[];
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extern struct srio_liodn_id_table srio_liodn_tbl[];
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extern struct liodn_id_table rman_liodn_tbl[];
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extern int liodn_tbl_sz, sec_liodn_tbl_sz, raide_liodn_tbl_sz;
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extern int fman1_liodn_tbl_sz, fman2_liodn_tbl_sz;
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extern int srio_liodn_tbl_sz;
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extern int rman_liodn_tbl_sz;
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#endif
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