upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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307 lines
8.0 KiB
307 lines
8.0 KiB
/*
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* Configuation settings for the SAMA5D3xEK board.
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*
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* Copyright (C) 2012 - 2013 Atmel
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*
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* based on at91sam9m10g45ek.h by:
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* Stelian Pop <stelian@popies.net>
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* Lead Tech Design <www.leadtechdesign.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include <asm/hardware.h>
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#define CONFIG_SYS_TEXT_BASE 0x26f00000
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/* ARM asynchronous clock */
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#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
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#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
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#define CONFIG_ARCH_CPU_INIT
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#ifndef CONFIG_SPL_BUILD
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#endif
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_CMD_BOOTZ
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#define CONFIG_OF_LIBFDT /* Device Tree support */
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#define CONFIG_SYS_GENERIC_BOARD
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/* general purpose I/O */
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#define CONFIG_AT91_GPIO
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/* serial console */
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#define CONFIG_ATMEL_USART
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#define CONFIG_USART_BASE ATMEL_BASE_DBGU
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#define CONFIG_USART_ID ATMEL_ID_DBGU
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/*
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* This needs to be defined for the OHCI code to work but it is defined as
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* ATMEL_ID_UHPHS in the CPU specific header files.
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*/
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#define ATMEL_ID_UHP ATMEL_ID_UHPHS
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/*
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* Specify the clock enable bit in the PMC_SCER register.
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*/
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#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
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/* LCD */
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#define CONFIG_LCD
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#define LCD_BPP LCD_COLOR16
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#define LCD_OUTPUT_BPP 24
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#define CONFIG_LCD_LOGO
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#define CONFIG_LCD_INFO
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#define CONFIG_LCD_INFO_BELOW_LOGO
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#define CONFIG_SYS_WHITE_ON_BLACK
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#define CONFIG_ATMEL_HLCD
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#define CONFIG_ATMEL_LCD_RGB565
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#define CONFIG_SYS_CONSOLE_IS_IN_ENV
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/* board specific (not enough SRAM) */
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#define CONFIG_SAMA5D3_LCD_BASE 0x23E00000
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#define CONFIG_BOOTDELAY 3
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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/* NOR flash */
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#define CONFIG_CMD_FLASH
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#ifdef CONFIG_CMD_FLASH
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#define CONFIG_FLASH_CFI_DRIVER
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#define CONFIG_SYS_FLASH_CFI
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#define CONFIG_SYS_FLASH_PROTECTION
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#define CONFIG_SYS_FLASH_BASE 0x10000000
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#define CONFIG_SYS_MAX_FLASH_SECT 131
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#else
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#define CONFIG_SYS_NO_FLASH
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#endif
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/*
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* Command line configuration.
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*/
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#include <config_cmd_default.h>
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#undef CONFIG_CMD_FPGA
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#undef CONFIG_CMD_IMI
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#undef CONFIG_CMD_LOADS
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_DHCP
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/* SDRAM */
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
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#define CONFIG_SYS_SDRAM_SIZE 0x20000000
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#ifdef CONFIG_SPL_BUILD
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#define CONFIG_SYS_INIT_SP_ADDR 0x310000
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#else
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
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#endif
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/* SerialFlash */
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#define CONFIG_CMD_SF
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#ifdef CONFIG_CMD_SF
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#define CONFIG_ATMEL_SPI
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#define CONFIG_SPI_FLASH
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#define CONFIG_SPI_FLASH_ATMEL
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#define CONFIG_SF_DEFAULT_SPEED 30000000
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#endif
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/* NAND flash */
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#define CONFIG_CMD_NAND
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#ifdef CONFIG_CMD_NAND
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#define CONFIG_NAND_ATMEL
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
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/* our ALE is AD21 */
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#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
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/* our CLE is AD22 */
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#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
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#define CONFIG_SYS_NAND_ONFI_DETECTION
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/* PMECC & PMERRLOC */
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#define CONFIG_ATMEL_NAND_HWECC
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#define CONFIG_ATMEL_NAND_HW_PMECC
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#define CONFIG_PMECC_CAP 4
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#define CONFIG_PMECC_SECTOR_SIZE 512
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#define CONFIG_CMD_NAND_TRIMFFS
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#endif
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/* Ethernet Hardware */
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#define CONFIG_MACB
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#define CONFIG_RMII
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#define CONFIG_NET_RETRY_COUNT 20
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#define CONFIG_MACB_SEARCH_PHY
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#define CONFIG_RGMII
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#define CONFIG_CMD_MII
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#define CONFIG_PHYLIB
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#define CONFIG_PHY_MICREL
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#define CONFIG_PHY_MICREL_KSZ9021
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/* MMC */
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#define CONFIG_CMD_MMC
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#ifdef CONFIG_CMD_MMC
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#define CONFIG_MMC
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#define CONFIG_GENERIC_MMC
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#define CONFIG_GENERIC_ATMEL_MCI
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#define ATMEL_BASE_MMCI ATMEL_BASE_MCI0
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#endif
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/* USB */
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#define CONFIG_CMD_USB
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_ATMEL
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#define CONFIG_USB_ATMEL_CLK_SEL_UPLL
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#define CONFIG_USB_OHCI_NEW
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#define CONFIG_SYS_USB_OHCI_CPU_INIT
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#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
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#define CONFIG_SYS_USB_OHCI_SLOT_NAME "sama5d3"
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3
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#define CONFIG_DOS_PARTITION
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#define CONFIG_USB_STORAGE
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#endif
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/* USB device */
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#define CONFIG_USB_GADGET
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#define CONFIG_USB_GADGET_DUALSPEED
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#define CONFIG_USB_GADGET_ATMEL_USBA
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#define CONFIG_USB_ETHER
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#define CONFIG_USB_ETH_RNDIS
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#define CONFIG_USBNET_MANUFACTURER "Atmel SAMA5D3xEK"
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#if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC)
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#define CONFIG_CMD_FAT
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#define CONFIG_FAT_WRITE
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#endif
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#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
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#ifdef CONFIG_SYS_USE_SERIALFLASH
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/* bootstrap + u-boot + env + linux in serial flash */
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#define CONFIG_ENV_IS_IN_SPI_FLASH
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#define CONFIG_ENV_OFFSET 0x5000
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#define CONFIG_ENV_SIZE 0x3000
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#define CONFIG_ENV_SECT_SIZE 0x1000
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#define CONFIG_BOOTCOMMAND "sf probe 0; " \
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"sf read 0x22000000 0x42000 0x300000; " \
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"bootm 0x22000000"
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#elif CONFIG_SYS_USE_NANDFLASH
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/* bootstrap + u-boot + env in nandflash */
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#define CONFIG_ENV_IS_IN_NAND
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#define CONFIG_ENV_OFFSET 0xc0000
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#define CONFIG_ENV_OFFSET_REDUND 0x100000
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#define CONFIG_ENV_SIZE 0x20000
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#define CONFIG_BOOTCOMMAND "nand read 0x21000000 0x180000 0x80000;" \
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"nand read 0x22000000 0x200000 0x600000;" \
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"bootm 0x22000000 - 0x21000000"
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#elif CONFIG_SYS_USE_MMC
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/* bootstrap + u-boot + env in sd card */
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#define CONFIG_ENV_IS_IN_FAT
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#define FAT_ENV_INTERFACE "mmc"
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#define FAT_ENV_FILE "uboot.env"
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#define FAT_ENV_DEVICE_AND_PART "0"
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#define CONFIG_ENV_SIZE 0x4000
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#define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 dtb; " \
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"fatload mmc 0:1 0x22000000 uImage; " \
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"bootm 0x22000000 - 0x21000000"
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#else
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#define CONFIG_ENV_IS_NOWHERE
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#endif
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#ifdef CONFIG_SYS_USE_MMC
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#define CONFIG_BOOTARGS \
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"console=ttyS0,115200 earlyprintk " \
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"root=/dev/mmcblk0p2 rw rootwait"
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#else
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#define CONFIG_BOOTARGS \
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"console=ttyS0,115200 earlyprintk " \
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"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
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"256K(env),256k(evn_redundent),256k(spare)," \
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"512k(dtb),6M(kernel)ro,-(rootfs) " \
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"rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
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#endif
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_PROMPT "U-Boot> "
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#define CONFIG_SYS_CBSIZE 256
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_SYS_HUSH_PARSER
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (1024 * 1024)
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/* SPL */
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#define CONFIG_SPL_FRAMEWORK
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#define CONFIG_SPL_TEXT_BASE 0x300000
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#define CONFIG_SPL_MAX_SIZE 0x10000
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#define CONFIG_SPL_BSS_START_ADDR 0x20000000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
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#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
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#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
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#define CONFIG_SPL_LIBCOMMON_SUPPORT
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#define CONFIG_SPL_LIBGENERIC_SUPPORT
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#define CONFIG_SPL_GPIO_SUPPORT
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#define CONFIG_SPL_SERIAL_SUPPORT
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#define CONFIG_SPL_BOARD_INIT
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#define CONFIG_SYS_MONITOR_LEN (512 << 10)
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#ifdef CONFIG_SYS_USE_MMC
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#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/u-boot-spl.lds
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#define CONFIG_SPL_MMC_SUPPORT
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#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400
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#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
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#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
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#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
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#define CONFIG_SPL_FAT_SUPPORT
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#define CONFIG_SPL_LIBDISK_SUPPORT
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#elif CONFIG_SYS_USE_NANDFLASH
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#define CONFIG_SPL_NAND_SUPPORT
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#define CONFIG_SPL_NAND_DRIVERS
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#define CONFIG_SPL_NAND_BASE
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
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#define CONFIG_SYS_NAND_5_ADDR_CYCLE
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#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
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#define CONFIG_SYS_NAND_PAGE_COUNT 64
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#define CONFIG_SYS_NAND_OOBSIZE 64
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#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
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#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
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#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
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#elif CONFIG_SYS_USE_SERIALFLASH
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#define CONFIG_SPL_SPI_SUPPORT
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#define CONFIG_SPL_SPI_FLASH_SUPPORT
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#define CONFIG_SPL_SPI_LOAD
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#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400
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#endif
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#endif
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